| 快速3D DWT核心算法的VLSI并行化设计 |
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| 引用本文： | 魏本杰,刘明业,周艺华,成宝栋.快速3D DWT核心算法的VLSI并行化设计[J].北京理工大学学报,2006,26(3):211-215. |
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| 作者姓名： | 魏本杰 刘明业 周艺华 成宝栋 |
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| 作者单位： | 北京理工大学,计算机科学技术学院,北京,100081;北京电子科技学院,计算机系,北京,100070;北京理工大学,计算机科学技术学院,北京,100081 |
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| 摘 要： | 通过深入研究三维离散小波变换(3D DWT)核心算法,将其分解为3个一维的小波变换(1D DWT). 在完成3D DWT软件实现的基础上,提出了一种并行化设计的VLSI结构,由3个片上双口RAM存储中间结果并进行矩阵转置,建立了3个1D DWT组成的流水化模型,设计中利用有限状态机(FSM)控制流程. 仿真实验证明,设计方法正确有效,处理速度比串行方式提高约66%,工作频率达59MHz,可满足视频编码器的实时性要求.
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| 关 键 词： | 三维离散小波变换 并行化设计 矩阵转置 有限状态机 |
| 文章编号： | 1001-0645(2006)03-0211-05 |
| 收稿时间： | 7/7/2005 12:00:00 AM |
| 修稿时间： | 2005年7月7日 |
Paralell VLSI Design for the Fast 3D Discrete Wavelet Transform Core Algorithm |
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| WEI Ben-jie,LIU Ming-ye,ZHOU Yi-hua and CHENG Bao-dong.Paralell VLSI Design for the Fast 3D Discrete Wavelet Transform Core Algorithm[J].Journal of Beijing Institute of Technology(Natural Science Edition),2006,26(3):211-215. |
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| Authors: | WEI Ben-jie LIU Ming-ye ZHOU Yi-hua and CHENG Bao-dong |
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| Institution: | School of Computer Science and Technology,Beijing Institute of Technology,Beijing 100081,China; Department of Computer Science,Beijing Electronic Science and Technology Institute,Beijing 100070,China;School of Computer Science and Technology,Beijing Institute of Technology,Beijing 100081,China;School of Computer Science and Technology,Beijing Institute of Technology,Beijing 100081,China;School of Computer Science and Technology,Beijing Institute of Technology,Beijing 100081,China |
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| Abstract: | By studying three dimensional discrete wavelet transform(3D DWT) core algorithm in deepness,the paper divides it into three one dimensional discrete wavelet transforms(1D DWT).Based on the implementation of 3D DWT software,a VLSI architecture of paralell design is produced.It needs three double port RAM to store the temporay results and transpose the matrix,then builds up a pipelining model composed of three 1D DWT.In this design the finite state machine(FSM) is well used to control the flow.Compared with the serial mode,the experimental results of post synthesized simulation show that the method of design is correct and effective.It can increase processing speed about 66%,and work with 59?MHz,meeting the real time needs of video encoder. |
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| Keywords: | 3D DWT paralell design matrix transposition finite state machine |
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