高速背板互连的信号完整性仿真方法

提出了一种高速背板互连的信号完整性仿真方法。高速接插件的厂商只提供参数模型，借助矢量拟合方法可以推导出电路模型，再使用部分元等效电路法仿真走线得到等效电路模型。推导出联合仿真的方法，实现了高速背板互连的信号完整性仿真。通过等效电路的仿真结果和厂商提供的原始参数进行的比较，以及部分元等效电路法与商用软件仿真结果的比较验证了等效电路的正确性。最后对完整的板间互连通道进行了仿真，并将最终的仿真结果与商用软件的仿真结果进行了比较，证明了所提方法的正确性，给出了整个通道眼图仿真分析结果。

Signal integrity simulation method for high-speed backplane interconnection

A signal integrity simulation method for high-speed backplane interconnection is proposed. The high-speed interconnector manufacturer provides only a parameter model, but by using the vector fitting method, the circuit model can be gained. The traces are analyzed by the partial equivalent element circuit (PEEC) method. A combination simulation method is derived, and the signal integrity simulation of the high-speed backplane interconnection is realized. The correctness of the equivalent circuit is verified by comparing the simulation result to the original parameter provided by the manufacturer, and the PEEC simulation results to the commercial software simulation results. Finally, a complete high-speed backplane interconnection channel is simulated, the correctness of the results is verified by comparing with those obtained from the commercial software. The analysis results of the eye diagram with the channel are given.