| Improved algorithm for RDO in JPEG2000 encoder and its IC design |
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| 作者姓名： | Xie Xiang Li GuoLin Zhang Chun Zhang Li & Wang ZhiHua Dept. of Electronic Engineering Tsinghua Univ. Beijing P. R. China |
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| 作者单位： | Xie Xiang，Li GuoLin，Zhang Chun，Zhang Li & Wang ZhiHua Dept. of Electronic Engineering，Tsinghua Univ. Beijing 100084，P. R. China |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 1 .INTRODUCTIONJPEG2000is a newi mage codingstandard usingstate-of-the-art compression techniques based on wavelet trans-formationfor still i mage compression.It has a variety ofapplications from digital cameras through to advancedmedium, medical i maging, mobile application,remotesensing etc. Hardware i mplementation of JPEG2000 isveryi mportant for suchapplications.The block diagramof a JPEG2000 encoder /decoderisillustratedin Fig.1 .In Fig.1 ,input of RDOfromthe arithmeticcoding…
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| 收稿时间： | 3 November 2004 |
Improved algorithm for RDO in JPEG2000 encoder and its IC design |
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| Xie Xiang,Li GuoLin,Zhang Chun,Zhang Li & Wang ZhiHua Dept. of Electronic Engineering,Tsinghua Univ. Beijing ,P. R. China.Improved algorithm for RDO in JPEG2000 encoder and its IC design[J].Journal of Systems Engineering and Electronics,2006,17(2):430-436. |
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| Authors: | Xie Xiang Li Guolin Zhang Chun Zhang Li Wang Zhihua |
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| Institution: | Dept. of Electronic Engineering, Tsinghua Univ., Beijing 100084, P. R. China |
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| Abstract: | An improved rate distortion optimization (RDO) a lgorithm in JPEG2000 is proposed. The proposed algorithm is suitable for integra ted circuit (IC) implementation and can reduce 30% computational cost. A hardwar e architecture which includes control unit, memory, divider, data convert er is also given to implement the algorithm. The circuit based on the improved a lgorithm is tested on FPGAs and integrated in a JPG2000 chip codec core. |
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| Keywords: | rate distortion optimization JPEG2000 integrated circuit (IC) codec core |
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