Construction of a multidimensional plane network-on-chip architecture based on the hypercube structure |
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Authors: | Chang Wu Yubai Li Qicong Peng Song Chai Zhongming Yang |
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Affiliation: | DSP Lab,School of Communication and Information Engineering,University of Electronic Science and Technology of China,Chengdu 610054,China |
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Abstract: | In current network-on-chip (NOC) studies and in practical applications, the mesh structure is the most widely used and deeply researched structure. However, the hypercube structure is more symmetrical and regular than the mesh or torus structures. This paper compares the network characteristics of these three direct topologies and proposes a method to compress the hypercube into a plane structure. This structure, which has the multidimensional property based on the hypercube, is called the multidimensional plane (MDP) NOC. The compression process is divided into two steps: the transformation of router denotations and the connection of channels. Then, SystemC is used to implement the MDP NOC and it is compared with the mesh and torus NOCs in terms of four aspects ofperformance, including average latency time, normalization throughput, energy consumption and area cost. |
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Keywords: | NOC Hypercube Dimension SystemC Simulation |
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