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基于CMOS工艺的10位逐次逼近型模数转换器设计分析
引用本文:季红兵. 基于CMOS工艺的10位逐次逼近型模数转换器设计分析[J]. 盐城工学院学报(自然科学版), 2006, 19(4): 42-45
作者姓名:季红兵
作者单位:南通大学,电子信息学院,江苏,南通,226007
摘    要:逐次逼近型模数转换器由于性能折衷而得到了广泛的应用。其中,比较器和数模转换器的精度和速度极大地限制了整个系统的性能。因此,具有失配校准功能的比较器是逐次逼近型模数转换器的关键。设计了10bit逐次逼近型模数转换器中的比较器,对比较器的电路结构和工作原理有较详细的论述。

关 键 词:逐次逼近型模数转换器  比较器  数模转换器
文章编号:1671-5322(2006)04-0042-04
收稿时间:2006-09-27
修稿时间:2006-09-27

Design and Analysis of An 10 -bit Successive Approximation ADC Based on CMOS Technics
JI Hong-bing. Design and Analysis of An 10 -bit Successive Approximation ADC Based on CMOS Technics[J]. Journal of Yancheng Institute of Technology(Natural Science Edition), 2006, 19(4): 42-45
Authors:JI Hong-bing
Affiliation:Electronic Communication College,Nantong University,Jiangsu Nantong 226007,China
Abstract:The successive - approximation analog - to - digital converter is widely used because of its eclectic capabilities. In this kind of converter, the speed and precision of comparator and digital - to -analog converter greatly affect the performance of the whole system. Therefore, the design of comparator with offset cancellation technology is the key to the SAB ADC. A eomperator used in a 10 - bit SAR ADC is designed and presented in this paper. The author describes the architecture of this comperator in detail.
Keywords:successive - approximation ADC   comparator   digital - to - analog converter
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