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数字逻辑电路设计方法探讨
引用本文:陈立万.数字逻辑电路设计方法探讨[J].四川师范大学学报(自然科学版),2000,23(6):656-658.
作者姓名:陈立万
作者单位:重庆三峡学院,电子工程系,重庆,万洲,404000
摘    要:全加器是算术逻辑运算中非常重要的组成部分,对其深入探索、正确理解有极其重要的意义,通过对全加器的逻辑表达演变,采用不同器件,用多种方法设计出一位全加器,使实验者或产品开发者等在使用全加器时,根据具体条件,选择不同方法完成其功能,以达到对数字逻辑电路设计方法较全面的理解。

关 键 词:全加器  数字逻辑电路  算术逻辑运算  设计
修稿时间::

Study on Designing Methods in the Digital and Logic Circuit
CHEN Li-wan.Study on Designing Methods in the Digital and Logic Circuit[J].Journal of Sichuan Normal University(Natural Science),2000,23(6):656-658.
Authors:CHEN Li-wan
Abstract:The full adder is an important part in the arithmetic and logic operation, and to study it further and well has great meaning. 1-bit full adders have been designed by changing logic function, using different parts and adopting many methods in the text. Then, expermenters or de velopers of product etc.can complete the function of the full adder according to specific condition and different ways when they use full adders. So designing m ethods in the digital and logic circuit can be comprehended more completely.
Keywords:Full adders  Logic expression  Logic  circu    
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