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| 飞机座舱图形显示加速系统设计及FPGA实现 | |
| 引用本文： | 胡小龙,周俊明,夏显忠,李迅,郑博文.飞机座舱图形显示加速系统设计及FPGA实现[J].中南大学学报(自然科学版),2008,39(5). |
| 作者姓名： | 胡小龙 周俊明 夏显忠 李迅 郑博文 |
| 作者单位： | 1. 中南大学,信息科学与工程学院,湖南,长沙,410075 2. 长沙湘计海盾科技有限公司,湖南,长沙,410007 3. 国防科学技术大学,机电工程与自动化学院,湖南,长沙,410073 |
| 摘 要： | 提出一种飞机座舱综合显示系统中基于现场可编程门阵列(FPGA)的2D图形硬件加速引擎设计方案,将图形分解为一系列基本的点和水平线输出.为避免图形加速引擎直接对SDRAM的零碎操作导致的存储器操作瓶颈,引入图形缓存机制,并根据图形像素的存储特点,提出远区域优先(FAF)图形缓存页面淘汰算法.讨论图形加速引擎内部各模块的逻辑结构及其逻辑设计,在对模块进行波形仿真的基础上,实现系统级仿真结果的可视化验证.仿真及实际应用结果表明,所提出的图形加速引擎提高了图形显示性能,满足当前飞机中对2D图形实时显示及飞控系统的可靠性要求. |
| 关 键 词： | 2D图形 硬件加速 图形缓存 现场可编程门阵列 |
Design and implementation of graphics accelerating display system based on FPGA |
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| HU Xiao-long,ZHOU Jun-ming,XIA Xian-zhong,LI Xun,ZHENG Bo-wen.Design and implementation of graphics accelerating display system based on FPGA[J].Journal of Central South University:Science and Technology,2008,39(5). | |
| Authors: | HU Xiao-long ZHOU Jun-ming XIA Xian-zhong LI Xun ZHENG Bo-wen |
| Institution: | HU Xiao-long1,ZHOU Jun-ming1,XIA Xian-zhong2,LI Xun3,ZHENG Bo-wen1(1.School of Information Science , Engineering,Central South University,Changsha 410075,China,2.Changsha HCC-Hiden Technology Co.Ltd,Changsha 410007,3.College of Mechatronics , Automation,National University of Defense Technology,Changsha 410073,China) |
| Abstract: | A new design scheme of 2D graphic accelerating engine based on field programmable gate array(FPGA) in aircraft cockpit display system was studied.Graphics were output by transforming into a series of basic points and level lines.In order to avoid the memory bottleneck caused by the fragmentary operations of graphics accelerating engine to SDRAM directly,a graphics cache mechanism using farthest area first(FAF) buffering replacement algorithms was introduced in the graphic engine.The detailed logic architect... |
| Keywords: | 2D graphics accelerating engine graphics cache field programmable gate array |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ | |