锁相环的改进及仿真

提出了一种改进锁相环线性性能的方法,即在基本锁相环的基础上增加一个常数增益元件C和一个低通滤波器L(s),同时使用鉴频鉴相器(PFD)代替鉴相器(PD).这可使锁相环具有大的捕捉范围并能快速锁定,尤其是在锁定时间方面远优于基本锁相环.通过对锁相环路进行增益补偿,扩大了锁相环路的线性分析范围,改善了锁相环路的线性工作性能;通过介绍Simulink环境下的锁相环仿真方法,直观地得出了频率捕捉时间、捕捉范围等锁相环参数,验证了在噪声环境下改进方法的可行性.

The improvement and simulation of phase-locked loop

A method of improving linear performance of phase-locked loop(PLL) is presented,that is adding a constant gain component C,a low-pass filter L(s) to basis phase-locked loop,and using phase-frequency detector(PFD) instead of phase detector(PD).PLL thereof has a very large acquisition range and achieves locking very fast;especially it outperforms the standard PLL in locking time.Thus it amplifies its linear analytic range,improves its linear work performance by compensating for gain of PLL.A simulation method of PLL is introduced under the conditions of Simulink.Parameters of PLL:frequency acquisition time and acquisition range intuitionally are given.And the feasibilities and merits of the method are testified under noise conditions.