用于卷积计算的搏动型结构的研究

本文介绍一组用于卷积计算的搏动型线路,包括总数据通讯和无总数据通讯的搏动型卷积阵列两大类别,搏动型结构允许对每次访问存贮器的数据多次计算,无需增加I/O带宽就能够提高运算受限问题的运算速度.搏动型结构(Systolic Architectures)系统可以解决许多运算受限计算问题.卷积计算可用于搏动型结构系统的研究.由单片机作为处理单元的搏动型结构,可有效地实现卷积计算.

A STUDY OF SYSTOLIC STRUCTURE FOR CONVOLUTION COMPUTATION

In this paper, a family of systolic designs for convolution computation classified into two categories, convolution arrays with and without global data communication, is proposed. Systolic architecture, which permits multiple computations for each memory access, can speed up execution of compute-bound problems without increasing I/O requirements.A lot of compute-bound computation problems can be solved by systolic architecture systems, onvolution computation problems can be used in the study of systolic structure. The convolution computation can be implemented efficiently using the systolic architecture systems which are consisted of several single-chip processors served as processing elements.