高灵敏度GPS接收机捕获电路的优化与实现

基于传统的时域并行相关的能量检测技术提出一种资源优化方法, 通过两步相关法和分时共享技术进行相干积分, 对某一估计频率下的 1023 个不同的码相位进行并行处理, 在采样频率为 16. 368 MHz 的条件下所需相关器数量减少为未优化前的 1/ 102. 3。用 Verilog 硬件描述语言实现了采用优化技术的能量检测器, 给出了FPGA 实现结果和 Design Compiler 的综合结果。测试结果表明, 在预检测积分时间为 2s, C/N₀ = 21dB-Hz, 虚警概率为0. 097% 时, 捕获概率可达到90%。

Acquisition Circuit for HSGPS Receivers:Optimization and Implementation

The authors propose an optimizing method for the energy detector based on the parallel correlators in the time domain.With a method named as two-step correlation method and time sharing techniques,all the 1023 chip phases are detected in parallel.When the sampling frequency is 16.368 MHz,the total correlator number is reduced to be 1 /102.3 of the non-optimized counterpart.Furthermore,the energy detector using the proposed method is implemented by FPGA and synthesized with Design Compiler.The test results s...