Design and implementation of a DSP with multi-level low power strategies for cochlear implants |
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Authors: | Mai Songping Zhang Chun Chao Jun Wang Zhihua |
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Institution: | 1. Department of Electronic Engineering,Tsinghua University,Beijing 100084,P.R.China 2. Institute of Microelectronics,Tsinghua University,Beijing 100084,P.R.China |
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Abstract: | This paper presents the design and implementation of a low power digital signal processor(THUCID- SP-1)targeting at application for cochlear implants.Multi-level low power strategies including algorithm optimization,operand isolation,clock gating and memory partitioning are adopted in the processor design to reduce the power consumption.Experimental results show that the complexity of the Continuous Inter- leaved Sampling(CIS)algorithm is reduced by more than 80% and the power dissipation of the hardware al... |
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Keywords: | digital signal processor (DSP) cochlear implant (CI) low power algorithm optimization operand isolation clock gating memory partitioning |
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