寄存器传输级存储器工艺映射算法

给出了用库中的一组存储器模块来综合一个源存储器模块的方法，该方法支持使用高层次综合和设计再利用的现代VISI设计方法学。定义存储器的映射为端口映射、字长映射和字数映射。最后把这3个子问题综合起来形成完整的算法。实验结果表明，寄存器传输级工艺映射（RTLM）在高层次综合中对存储器的设计再利用是一种有效的方法。

Register-Transfer Level Mapping Algorithms for Memories

This paper presented a library mapping algorithm for register transfer(RT) level components that supports the current design methodologies using high level design and design reuse. The algorithm synthesizes the source memory using one or more memory modules from a target memory library. It defines three sub problems for memory mapping, i.e. port mapping, bit width mapping and word mapping and finally combines those solutions into an efficient memory mapping algorithm. The experimental results show that the register transfer level mapping(RTLM) is an effective approach for reuse of memory designs in high level synthesis.