多晶硅薄膜晶体管的有效迁移率模型

提出一个多晶硅薄膜晶体管的有效迁移率模型.该模型同时考虑了晶体管沟道内晶粒的数目、载流子在晶粒与晶粒间界处不同的输运特性和栅致迁移率降低效应,适应于从小晶粒到大晶粒线性区的多晶硅薄膜晶体管.研究表明:当晶粒尺寸Lg0.4μm时,其有效迁移率主要由晶粒间界控制;降低晶粒间界陷阱态密度可提高有效迁移率;减小栅氧化层厚度可增强栅压对有效迁移率的控制作用;高栅压时出现明显的有效迁移率退化效应.

Effective Mobility Model of Polysilicon Thin-Film Transistors

Based on assuming the total channel resistance is the combination resistances of grains and grain boundaries in series, an effective mobility model is proposed for polysilicon thin film transistors. The model takes into account the number of grains within the channel and gate bias controlling mobility degradation effect. It is found that the effective mobility of small-grain polysilicon thin film transistors is mostly controlled by grain boundaries. But for large-grain polysilicon, especially when LG > 0.4μm , the influence of grains becomes more critical. It also suggests that gate oxide thickness is a key factor that influences the gate bias controlling mobility degradation effect. Comparison between the model and the experimental data shows excellent agreement over wide range of gate voltages.