| AD9516-3时钟设计及在中频数字系统中的应用 |
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| 引用本文： | 胡广洲,赵忠凯,司锡才.AD9516-3时钟设计及在中频数字系统中的应用[J].应用科技,2009,36(7):28-32. |
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| 作者姓名： | 胡广洲 赵忠凯 司锡才 |
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| 作者单位： | 哈尔滨工程大学,信息与通信工程学院,黑龙江,哈尔滨,150001 |
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| 摘 要： | 高速ADC（analog to digital converter，模／数转换器）对时钟质量的要求越来越高，为此介绍了一种基于时钟同步器与抖动清除器AD9516．3的低抖动时钟设计，并分析了时钟抖动对信噪比的影响，介绍了在中频数字接收机中AD9516—3的具体设计应用，引入了Signal Tap这种新的测试方法，最后测试了时钟性能，整体指标达到设计要求．
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| 关 键 词： | 数字接收机 时钟抖动 AD9516 Signal—Tap |
The design of clock AD9516-3 and the application in IF digital systems |
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| HU Guang-zhou,ZHAO Zhong-kai,SI Xi-cai.The design of clock AD9516-3 and the application in IF digital systems[J].Applied Science and Technology,2009,36(7):28-32. |
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| Authors: | HU Guang-zhou ZHAO Zhong-kai SI Xi-cai |
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| Institution: | (College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China) |
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| Abstract: | The high-speed ADC requires more and more quality of clock. The authors presented a kind of low-jitter clock AD9516-3, which is designed based on synchronization regulator and jitter eliminator. The authors also analyzed the impact of clock jitter on SNR, and presented the design and application of AD9516- 3 in IF digital receiver. A new test method of Signal Tap was introduced to test the quality of the clock. The test shows that the overall target meets the design requirements. |
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| Keywords: | AD9516 Signal-Tap |
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