| SEC-DED海明校验码算法研究及其FPGA实现 |
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| 引用本文： | 何秉姣,刘科. SEC-DED海明校验码算法研究及其FPGA实现[J]. 中南民族大学学报(自然科学版), 2012, 0(3): 89-92 |
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| 作者姓名： | 何秉姣 刘科 |
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| 作者单位： | 中南民族大学计算机科学学院 |
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| 基金项目： | 湖北省教育厅科学技术研究项目(B20110808) |
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| 摘 要： | 采用Multisim 11实现了SEC-DED海明码的编码、译码和纠错电路,并给出其相应时序仿真波形图.结果表明：其功能能满足SEC-DED的需要,为FPGA快速准确实现SEC-DED校验码提供了一种占用资源少、校验可靠高速的方案.
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| 关 键 词： | SEC-DED海明校验码 现场可编程门阵列 时序仿真 |
SEC-DED Hamming Check Code Algorithm and Its Implementation in FPGA |
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| He Bingjiao,Liu Ke. SEC-DED Hamming Check Code Algorithm and Its Implementation in FPGA[J]. Journal of South-Central Univ for, 2012, 0(3): 89-92 |
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| Authors: | He Bingjiao Liu Ke |
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| Affiliation: | (College of Computer Science,South-Central University for Nationalities,Wuhan 430074,China) |
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| Abstract: | The algorithm of SEC-DED Hamming check code and its encoding,decoding,circuits of error correction are realized by Multisim 11,and their corresponding timing simulation waveforms are presented.It is indicated that its function can meet the needs of the SED-DED.This method is explored to realize the SEC-DED Hamming check code by FPGA quickly and accurately,occupying less resources. |
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| Keywords: | SEC-DED Hamming check code FPGA timing simulation |
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