| 基于FPGA的双倍速率动态存储器设计 |
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| 引用本文： | 张锋,宋弘. 基于FPGA的双倍速率动态存储器设计[J]. 四川理工学院学报(自然科学版), 2009, 22(2) |
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| 作者姓名： | 张锋 宋弘 |
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| 作者单位： | 四川理工学院自动化与电子信息学院,四川,自贡,643000;四川理工学院自动化与电子信息学院,四川,自贡,643000 |
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| 摘 要： | 文章介绍了双倍速率动态存储器的系统命令和结构,给出了一种基于状态机的DDRSDRAM控制器的设计,利用状态机对读写操作进行控制以提高系统性能,并实现了FPGA的控制器仿真。
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| 关 键 词： | DDR SDRAM控制器 状态机 FPGA |
Design of Dual Rate Dynamic Memory Based on FPGA |
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| ZHANG Feng,SONG Hong. Design of Dual Rate Dynamic Memory Based on FPGA[J]. Journal of Sichuan University of Science & Engineering(Natural Science Editton), 2009, 22(2) |
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| Authors: | ZHANG Feng SONG Hong |
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| Affiliation: | School of Automation and Electronic Information;Sichuan University of Science & Engineering;Zigong 643000;China |
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| Abstract: | The system commands and structure of dual rate dynamic memory are introduced in the paper.In order to make full use of the write-read control of FSM,a design method based on FSM is presented,and the simulation of DDR SDRAM based on FPGA is given. |
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| Keywords: | FPGA |
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