| HDTV解调芯片中RS解码器的电路优化 |
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| 引用本文： | 孙伟,吴建辉,顾烊.HDTV解调芯片中RS解码器的电路优化[J].解放军理工大学学报,2006,7(3):225-228. |
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| 作者姓名： | 孙伟 吴建辉 顾烊 |
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| 作者单位： | 东南大学国家专用集成电路系统技术研究中心,江苏南京210096 |
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| 摘 要： | 针对RS（reed-solomon）解码器在HDTV解调芯片中的应用,从运算子模块的优化开始,直至对整体电路的结构提出几种优化方法,解决了电路规模过大,结构过于复杂的问题.在优化过程中对常数乘法器采用了对相同运算逻辑的复用,使用分时复用对整体电路结构作出的简化,在设计中应用了读写分离的双口SRAM提高了电路速度.优化后的电路符合HDTV解调芯片的性能要求,成功实现了对RS（204,188）的解码纠错,同时缩小了电路规模、减小了复杂程度,降低了成本.
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| 关 键 词： | 电路优化 时分复用 迦罗华域 |
| 文章编号： | 1009-3443（2006）03-0225-04 |
| 收稿时间： | 2005-05-25 |
| 修稿时间： | 2005年5月25日 |
New c ircuit optmi iza tion of RS decoder applied in HDTV demodula tor |
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| SUN Wei,WU Jian-hui and GU Yang.New c ircuit optmi iza tion of RS decoder applied in HDTV demodula tor[J].Journal of PLA University of Science and Technology(Natural Science Edition),2006,7(3):225-228. |
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| Authors: | SUN Wei WU Jian-hui and GU Yang |
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| Institution: | National ASIC System Engineering and Technology Research Centre,Southeast University,Nanjing 210096,China;National ASIC System Engineering and Technology Research Centre,Southeast University,Nanjing 210096,China;National ASIC System Engineering and Technology Research Centre,Southeast University,Nanjing 210096,China |
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| Abstract: | From submodules to the whole circuit, several optimizing methods were introduced to simplify the architecture and to minish the circuit scale of RS decoder applied in HDTV demodulation chip. The optimizing methods mainly include the reusing of the same calculation logic in the constant multiplier and the idea of TDMA to simplify the whole circuit. Furthermore the application of two-port SRAM which has separate reading and writing speeds up the circuit. After optimization the circuit not only meets the performance requirement of the HDTV receiver chip but has smaller circuit scale, lower complexity and lower cost. |
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| Keywords: | circuit optimize TDMA(time division multiple access) GF(Galois field) |
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