| 采用标准单元的集成电路自动布图设计系统 |
| |
| 引用本文： | 杨之廉,申明,张建人,许丽珠,张平,张进,向采兰. 采用标准单元的集成电路自动布图设计系统[J]. 清华大学学报(自然科学版), 1988, 0(1) |
| |
| 作者姓名： | 杨之廉 申明 张建人 许丽珠 张平 张进 向采兰 |
| |
| 作者单位： | 微电子学研究所(杨之廉，申明，张建人，许丽珠，张平，张进)，微电子学研究所(向采兰) |
| |
| 摘 要： | 采用标准单元方法的集成电路设计系统是一个用于专用集成电路（ＡＳＩＣ）设计的自动布图系统。本系统建有 ３ｕｍ硅栅 ＣＭＯＳ标准单元库，设计人员只要输入被设计电 路的逻辑图（或逻辑网单文件），或逻辑模拟的输入文件，该系统就自动调用所需的单元和压煤块，进行自动布局和自动布线，最后得到电路的掩膜版图。设计实例表明，该系统使半定制电路的设计过程加快，但仍保持较高的芯片密度。
|
| 关 键 词： | 标准单元 掩膜版图 拓扑版图 半定制电路 |
An Automatic IC Layout System Applicable to Standard Cell Method |
| |
| Yang Zhilian,Shen Ming,Zhang Jianren,Xu Lizhu,Zhang Ping,Zhang Jin,Xiang Cailan. An Automatic IC Layout System Applicable to Standard Cell Method[J]. Journal of Tsinghua University(Science and Technology), 1988, 0(1) |
| |
| Authors: | Yang Zhilian Shen Ming Zhang Jianren Xu Lizhu Zhang Ping Zhang Jin Xiang Cailan |
| |
| Affiliation: | Institute of Microelectronics |
| |
| Abstract: | This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC). The system comprises a standard cell library with 3 micro Si-gate CMOS technology. As soon as the designer inputs a designed circuit logic scheme (or netlist file), or a input file for logic simulation, the system will automatically invoke the required cells and pads, carry out placement and routing automatically, and finally obtain a mask layout of designed circuit. Some examples using this design system show that this system speeds up the designing process for the semicustom circuit and still maitains a rather high chip density. |
| |
| Keywords: | standard cell mask layout topologic layout semicustom circuit. |
| 本文献已被 CNKI 等数据库收录！ |
|
