| VHDL语言实现FIFO存储控制 |
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| 引用本文： | 郑波祥,陈笑,齐晋.VHDL语言实现FIFO存储控制[J].应用科技,2003,30(12):37-39. |
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| 作者姓名： | 郑波祥 陈笑 齐晋 |
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| 作者单位： | 哈尔滨工程大学,自动化学院,黑龙江,哈尔滨,150001 |
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| 摘 要： | 介绍了用VHDL实现FIFO存储控制器的设计，给出了整个FIFO系统的控制原理，对控制单元作了详细的说明，并给出控制器的读、写时序图、写周期的状态图和部分编制的程序．控制器用于试验中的某数据处理模块中，运行稳定，从设计的特征看，这个控制器有一定的通用性和实用性．
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| 关 键 词： | VHDL语言 FIFO存储控制器 设计 先进先出储存器 数据缓冲器 |
| 文章编号： | 1009-671X(2003)012-0037-03 |
| 修稿时间： | 2002年11月13 |
FIFO memory controller based on VHDL design |
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| ZHENG Bo-xiang,CHEN Xiao,QI Jin.FIFO memory controller based on VHDL design[J].Applied Science and Technology,2003,30(12):37-39. |
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| Authors: | ZHENG Bo-xiang CHEN Xiao QI Jin |
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| Abstract: | The design of a FIFO memory controller was completed with VHDL.The theory of FIFO system was introduced and the structure of controlling unit was shown clearly, and reading and writting time sequence were also given.This controller is now successfully used in the data processing module and it can be used in many areas. |
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| Keywords: | VHDL FIFO memory controller controlling unit |
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