FPGA实现高速加窗复数FFT处理器的研究

研究采用FPGA设计高速专用FFT处理器的实现方法，使处理器能对复数数据顺序进行加窗、FFT及模平方运算．本设计具有4个特点：设计实现了只用一个运算单元进行以上3种运算的方案，有效地节省了逻辑资源；采用流水方式提高了系统的处理速度，使通信、计算、存储等操作协调一致；采用块浮点算法使系统兼有定点运算速度高与浮点运算精度高的特点；采用TMS存储模式，降低了对外围电路的速度要求．该设计方法可以广泛应用于高速数字信号处理领域．

The Study of High-Speed Windowed Complex FFT Processors Based on FPGA

A method of realizing high speed special FFT processor based on FPGA is presented. The processor can put the complex data into three operations in sequence: multiplying the window, performing FFT, and computing module square. Experiments prove that the design posseses four specialties. To save logic and hardware resources, the above three operations are performed by a single operation unit. As a result of adopting pipelined architecture, the processing speed is improved and the three operations including communication, calculation and storage work harmoniously. By using the block floating point algorithm, the system has the merit of high speed and high precision. TMS memory architecture requires less speed to the peripheral equipment. The design method can widely be used in high speed digital signal processing fields.