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VDMOSFET的终端优化设计
引用本文:孙嘉兴,杨颖,林爽.VDMOSFET的终端优化设计[J].辽宁大学学报(自然科学版),2006,33(3):228-231.
作者姓名:孙嘉兴  杨颖  林爽
作者单位:辽宁大学,物理系,辽宁,沈阳,110036
摘    要:主要介绍了VDMOSFET的终端优化设计,讨论了已有终端结构中的场环、场板技术,工作原理,以一种新型的高频VDMOSFET与模拟栅相结合的结构为例,详细讨论了场板在减少反馈电容、提高器件的击穿电压、降低导通电组、改善跨导、提高输出电阻、改进安全工作区方面的理论机制及作用。

关 键 词:VDMOSFET  结终端  击穿电压
文章编号:1000-5846(2006)03-0228-04
收稿时间:2005-11-25
修稿时间:2005-11-25

The Design of VDMOSFET Junction Temination Optimization
SUN Jia-xing,YANG Ying,LIN Shuang.The Design of VDMOSFET Junction Temination Optimization[J].Journal of Liaoning University(Natural Sciences Edition),2006,33(3):228-231.
Authors:SUN Jia-xing  YANG Ying  LIN Shuang
Institution:Department of Physics, Liaoning University, Shenyang 110036, China
Abstract:In this paper,the junction termination technology optimization of the vertical double-diffusion metal-oxide-semiconductor field effect transistor(VDMOSFET) is described. The operation principle of the field plate, the field limiting ring in the existed termination technology is analysed. And taking a novel high-frequence VDMOSFET structure with a dummy-gate for example,this paper discussing the theory and function of the field plate in lowering the feedback capacitance,raising the device breakdown voltage, lowering the on-state resistance, improving the transconductance, increasing the output resistance and improving the safe operating area(SOA).
Keywords:VDMOSFET  junction temination  breakdown voltage  
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