基于FPGA的可重构无线传感器网络节点设计

提出了一种简单的基于现场可编程门阵列(FPGA)模块来实现可重构无线传感器网络节点的方案.与传统方案相比,新方案较为精简,价格低廉,不再需要微控制器,大大减小了节点软硬件复杂度,可实现无线传感器网络节点的快速可重构设计.通过将自适应功率控制和低功耗媒体接入控制机制引入FPGA核,重构的节点大大地降低了功率消耗,充分表明提出的可重构设计方案是有效可行的.

Reconfigure Wireless Sensor Node Design Based on FPGA Core

In this paper we present a reconfigure wireless sensor node design through using an FPGA core. Traditional WSN node uses an FPGA, microcontroller and RF transceiver together; our proposed node only consists of FPGA and RF transceiver. By optimizing the hardware design, this node became more condense and low cost. The basic idea of our work is to design and develop an FPGA-based sensor node to allow rapid prototyping and reconfiguration of both hardware and software. In this paper we implement a low power MAC scheme and adaptive power control on the reconfigure FPGA core and decrease power consumption greatly, it shows that our reconfigure design method is available.