| Uniform wire segmentation algorithm of distributed interconnects |
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| 引用本文： | 尹国丽 Lin Zhenghui. Uniform wire segmentation algorithm of distributed interconnects[J]. 高技术通讯(英文版), 2007, 13(2): 198-202 |
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| 作者姓名： | 尹国丽 Lin Zhenghui |
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| 作者单位： | Department of Electronic Engineering, shanghai Jiaotong University.Shanghai 200030, P.R.China |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer inser-tion are obtained through computation and derivation, based on a 2-pole approximatian model of distribut-ed RLC interconnect. For typical inductance value and long wires under 180nm technology, experiments show that the uniform wire segmentation technique proposed in the paper can reduce delay by about 27%～56%, while requires 34%～69% less total buffer usage and thus 29% to 58% less power consump-tion. It is suitable for long RLC interconnect performance optimization.
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| 关 键 词： | 金属导线 驱动器 分割算法 缓冲器 |
Uniform wire segmentation algorithm of distributed interconnects |
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| Yin Guoli,Lin Zhenghui. Uniform wire segmentation algorithm of distributed interconnects[J]. High Technology Letters, 2007, 13(2): 198-202 |
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| Authors: | Yin Guoli Lin Zhenghui |
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| Abstract: | A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer insertion are obtained through computation and derivation, based on a 2-pole approximation model of distributed RLC interconnect. For typical inductance value and long wires under 180nm technology, experiments show that the uniform wire segmentation technique proposed in the paper can reduce delay by about 27% ～ 56% , while requires 34%～69% less total buffer usage and thus 29% to 58% less power consumption. It is suitable for long RLC interconnect performance optimization. |
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| Keywords: | distributed RLC interconnect uniform wire segmentation buffer insertion driver modeling |
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