实时视频SDRAM控制器的FPGA设计与实现

描述了一种1024×768高分辨率实时视频图像数据处理的方法。由于高分辨率的视频流数据量大,又要进行实时显示,对于这样大的数据量必定要求大容量存储器来进行缓存;SDRAM存储量大,价格低廉,非常适于本系统。分析了设计中所用的SDRAM性能、特点,给出了SDRAM初始化方式及其相应的模式设置值,并根据本设计的实际情况对SDRAM状态机进行了简化,给出了一种相对容易实现的SDRAM状态机。为了实现快速实时的视频传输数据,使用了两片SDRAM进行读写切换,以写满写SDRAM为切换的标志,这样保证图像数据实时显示。并在相应的硬件电路上做了彩条实验,证明控制器操作的可行性。

The Design and Implement of Real-time Video SDRAM Controller Based on FPGA

In this article,the structure and control sequence characteristics of SDRAM are described,and the critical techniques in the design of SDRAM controller based on FPGA are introduced.The characteristics,the initial mode and the state machine of the SDRAM controller are described.The scheme can extend the FPGA's memory capacity and is more economic.It is programmed by VHDL and the basic theory is applicable to other SDRAM.In order to control the SDRAM more effectively,two pieces of SDRAM should be switched to read and write in the design.