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JPEG2000 T2编码快速算法及硬件实现
引用本文:庄怀宇,吴成柯,邓家先,李云松,刘凯.JPEG2000 T2编码快速算法及硬件实现[J].系统工程与电子技术,2004,26(12):1939-1942.
作者姓名:庄怀宇  吴成柯  邓家先  李云松  刘凯
作者单位:西安电子科技大学ISN国家重点实验室,陕西,西安,710071
基金项目:"十五"军事通信预研项目基金(410010302)资助课题
摘    要:对JPEG2000中T2编码器的率失真优化算法和码流组织方法进行了深入分析,提出了一种易于硬件实现的T2编码器快速算法并详细给出了其硬件结构。通过降低率失真斜率估计的计算复杂度、简化优化截取方法和码流组织中标记树(tagtree)编码方法,降低了T2编码器硬件实现的难度,减少了硬件资源,提高了JPEG2000硬件系统处理的并行度。实验结果表明,输出码流符合JPEG2000标准格式,而图像质量下降很小,系统已通过了FPGA验证。

关 键 词:内嵌码块编码算法  T2编码器  率失真优化  标记树
文章编号:1001-506X(2004)12-1939-04
修稿时间:2003年11月22

Fast algorithm and hardware implementation for T2 encoder in JPEG2000
ZHUANG Huai-yu,WU Cheng-ke,DENG Jia-xian,LI Yun-song,LIU Kai niversity,Xi'an ,China.Fast algorithm and hardware implementation for T2 encoder in JPEG2000[J].System Engineering and Electronics,2004,26(12):1939-1942.
Authors:ZHUANG Huai-yu  WU Cheng-ke  DENG Jia-xian  LI Yun-song  LIU Kai niversity  Xi'an  China
Institution:ZHUANG Huai-yu,WU Cheng-ke,DENG Jia-xian,LI Yun-song,LIU Kai niversity,Xi'an 710071,China)
Abstract:A fast algorithm for T_2 encoder in JPEG2000 suitable for hardware implementation is presented based on the elaborate analysis of rate-distortion optimization algorithm, and its architecture of hardware design is explained in detail. By reducing the calculation complexity of the rate-distortion slope estimate and simplifying the design of optimized truncation and tag tree encoding in code stream organization, the difficulty and the resource of hardware implementation for T_2 encoder are reduced, and the parallelizability of the JPEG2000 hardware system enhancs. The experimental results show that the final code stream accords with the standard format of JPEG2000 and the quality loss of images is little. The system has been implemented on FPGA.
Keywords:EBCOT  T_2 encoder  rate distortion optimization  tag tree
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