高分辨率DDS的FPGA设计

直接数字频率合成器DDS在数字通信系统中的地位是非常重要的，其应用包括上下变频、调制解调、软件无线电等。DDS的优点是具有极高的分辨率、频率转换速率快、相位噪声低等；缺点是杂散度抑制比性能差，很难做到-65dB。DDS的实现一般采用查表法，且相位累加器地址到表询地址的映射采用量化方案。又利用FPGA，采用线性插值查表法对。DDS进行了实现。该方案利用了相位累加器的所有有效位，使DDS的性能得到提高，杂散度抑制比达到了-70dB。同时具有硬件资源占用少、设计灵活等优点。

Implementation of High Resolution DDS with FPGA

DDS(Direct Digital Synthesizer)plays an important role in digital communication systems.Typical application of DDS includes up/down converter,modulation/demodulation,SDR(Software Defined Radio),etc.DDS has both the advantages of high frequency resolution,rapid frequency change rate and low phase noise and the disadvantage of bad spur suppression performance with max value of -65 dB.Lookup table method is gererally used in the implementation of DDS,and quantization method for mapping phase accumulator address to table address is applied.The paper implemented DDS utilizing FPGA device and linear interpolation algorithm.This scheme utilizes all effective bits of phase accumulator address,and so can improve the performances of DDS,which has -70 dB of spur suppression value.The scheme also has the advantages of low hardware consumption,high frequency resolution,flexible design,etc.