首页 | 本学科首页   官方微博 | 高级检索  
     检索      

非对称性隧穿势垒Ge/Si复合纳米结构MOSFET存储特性的电路模拟
引用本文:周少华,杨红官.非对称性隧穿势垒Ge/Si复合纳米结构MOSFET存储特性的电路模拟[J].湖南工程学院学报(自然科学版),2006,16(1):12-15.
作者姓名:周少华  杨红官
作者单位:湖南大学,应用物理系,湖南,长沙,410082;永州职业技术学院,湖南,永州,425001;湖南大学,应用物理系,湖南,长沙,410082
摘    要:介绍了非对称性势垒单电子管(ATBs)的电路模拟和特性,以及采用准经典的Monte Carlo方法对Ge/Si复合纳米结构MOSFET存储器的电路模拟,得出由于台阶状复合势垒的作用,在擦写时间保持μs和ms量级的同时,存储时间可长达数年.从而解决了快速编程与长久存储之间的矛盾.

关 键 词:非对称势垒  复合纳米结构  单电子存储器  电路模拟
文章编号:1671-119X(2006)01-0012-04
收稿时间:09 12 2005 12:00AM
修稿时间:2005年9月12日

Circuit Simulation of Single Electron Device with Asymmetric Tunnel Barriers
ZHOU Shao-hua,YANG Hong-guan.Circuit Simulation of Single Electron Device with Asymmetric Tunnel Barriers[J].Journal of Hunan Institute of Engineering(Natural Science Edition),2006,16(1):12-15.
Authors:ZHOU Shao-hua  YANG Hong-guan
Institution:1. Dept. of Applied Physics, Hunan University, Changsha 410082, China; 2. Yongzhou Vocational Technical College, Yongzhou 425001, China
Abstract:In this paper,the property and circuit simulation of the Single Electron Device based on Asymmetric Tunnel Barriers, and the Ge/Si nanocrystal MOSFET memory with the Monte Carlo method in quasic classical approximation are introduced. It is demonstrated that the proposed device can achieve the programming in the order of/~s or ms owing to the hetero-energy bands, and the retention time is increased to several years at the same time. Hence the conflict between high speed programming and long retention can be efficiently resolved.
Keywords:asymmetric tunnel barrier  Ge/Si nanocrystal structure  single-electron memory  circuit simulation
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号