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高速低相差双路AD数据采集器的设计
引用本文:丁喜冬,龚康,薛淑军.高速低相差双路AD数据采集器的设计[J].中山大学学报(自然科学版),2001,40(1):29-31.
作者姓名:丁喜冬  龚康  薛淑军
作者单位:1. 中山大学物理学系,
2. 中山大学电子机械研究中心,
基金项目:国家自然科学基金资助项目(19974077);广东省攻关资助项目(99M01007G)
摘    要:介绍一种高速低相差双路AD数据采集器.通过使用比要求的采样速度更高速的ADC及对两路ADC进行严格的同步控制等措施,设计出的AD数据采集器具有相位抖动小于1个采样周期,并与采样速度无关,且对接口速度要求低、接口硬件简单等特点.实验表明,对频率为5Hz的模拟输入信号,其相位分辨率可达5×10

关 键 词:相位差  固体内耗仪  采样速度  高速低相差双路AD数据采集器  设计  采样周期  相位分辨率
文章编号:0529-6579(2001)01-01-0029-03
修稿时间:2000年4月5日

The Design of A High Speed AD Data Acquisition with Low Phase Delay
DING Xi-dong,GONG Kang,XUE Shu-jun.The Design of A High Speed AD Data Acquisition with Low Phase Delay[J].Acta Scientiarum Naturalium Universitatis Sunyatseni,2001,40(1):29-31.
Authors:DING Xi-dong  GONG Kang  XUE Shu-jun
Abstract:A high speed Analog-to-digital data acquisition with low phase delay between two channels is intro-duced. By using the AD converter with a higher speed than that of data acquisition, all of the synchronous signals are controlled strictly. The designed AD data acquisition has many advantages such as a phase delay smaller than a single acquisition period regardless of the acquisition speed, and a novel interface which demands low speed and simple hardware. Experiments show that the phase delay is about 5 x 10-i radian when the input analog signal fre-quence is 5 Hz.
Keywords:phase delay  AD data acquisition  the interal friction measurement instrument
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