| 脉冲异步电路的设计与仿真 |
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| 引用本文： | 邓建,武庆生,徐洁. 脉冲异步电路的设计与仿真[J]. 实验科学与技术, 2013, 0(6): 218-220,277 |
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| 作者姓名： | 邓建 武庆生 徐洁 |
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| 作者单位： | 电子科技大学计算机科学与工程学院,成都611731 |
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| 摘 要： | 该文针对大学计算机专业《数字逻辑设计》课程中脉冲异步时序逻辑电路的教学提出改进，将触发器的特性方程和时钟条件加以综合设计，采用仿真软件对设计方案进行验证，并示范在脉冲异步时序电路设计中的运用，有助于学生理解和掌握脉冲异步时序电路的设计和仿真方法。
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| 关 键 词： | 数字逻辑设计 仿真 脉冲异步时序 时钟信号 |
Design and Simulation for Pulse-mode Asynchronous Circuits |
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| DENG Jian,WU Qingsheng,XU Jie. Design and Simulation for Pulse-mode Asynchronous Circuits[J]. Experiment Science & Technology, 2013, 0(6): 218-220,277 |
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| Authors: | DENG Jian WU Qingsheng XU Jie |
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| Affiliation: | (School of Computer Science and Engineering, University of Electronic Science and Technology of China, Chengdu 6l 1731, China) |
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| Abstract: | In this paper, based on the teaching of the university computer professional digital logic design course, the synthesis of Flip-flop＇s characteristic equation and clock＇s function is put forward, the logic circuits is simulated by EDA tools to verify its correct- ness, and the demonstration of using Multisim is applied to an example of pulse-mode asynchronous sequential circuits, it will help student to understand and grasp the design and verify method for pulse-mode asynchronous circuits. |
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| Keywords: | digital logic design simulation pulse-mode asynchronous circuits clock signals |
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