| GPS／BDS自动校时系统的研究 |
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| 引用本文： | 伍建辉,许艳,肖芳,刘林兴. GPS／BDS自动校时系统的研究[J]. 湖南理工学院学报：自然科学版, 2014, 0(4): 68-70 |
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| 作者姓名： | 伍建辉 许艳 肖芳 刘林兴 |
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| 作者单位： | 湖南理工学院信息与通信工程学院;湖南理工学院计算机学院 |
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| 摘 要： | 给出了GPS／BDS自动校时系统的设计方案，FPGA通过GPS／BDS授时接收机对接收到的时间信息进行处理，完成自动校时和计时功能．本系统的最大的优点是采用FPGA作为精确计时的控制芯片，采用GPS／BDS授时接收机作为高安全性、高可靠性的标准时钟源．
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| 关 键 词： | GPS/BDS 自动校时:FPGA |
Research on the Automatic Time-correction System of GPS/BDS |
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| WU Jian-hui;XU yan;XIAO Fang;LIU Lin-xing. Research on the Automatic Time-correction System of GPS/BDS[J]. Journal of Hunan Institute of Science and Technology, 2014, 0(4): 68-70 |
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| Authors: | WU Jian-hui XU yan XIAO Fang LIU Lin-xing |
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| Affiliation: | WU Jian-hui;XU yan;XIAO Fang;LIU Lin-xing;College of Information & Communication Engineering, Hunan Institute of Science and Technology;College of Computer Science, Hunan Institute of Science and Technology; |
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| Abstract: | The paper proposes a designing plan of an automatic time-correction system of GPS/BDS. FPGA completes time-correction and timing function by processing the time information from the time transfer GPS/BDS receiver. The most remarkable advantage of the system is that it uses FPGA as precise timing control chip and uses the time transfer GPS/BDS receiver as high security and high reliability standard clock source. |
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| Keywords: | GPS/BDS automatic time-correction FPGA |
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