| 改进的并行积分算法低通滤波器的FPGA设计 |
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| 引用本文： | 马安仁,党存禄,李均国,樊省全. 改进的并行积分算法低通滤波器的FPGA设计[J]. 兰州理工大学学报, 2006, 32(6): 89-92 |
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| 作者姓名： | 马安仁 党存禄 李均国 樊省全 |
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| 作者单位： | 兰州理工大学,电气工程与信息工程学院,甘肃,兰州,730050;西北民族大学,电气工程学院,甘肃,兰州,730000;兰州理工大学,电气工程与信息工程学院,甘肃,兰州,730050 |
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| 摘 要： | 对积分算法低通滤波器进行了理论分析,通过加Hamming窗对其进行了改进,使其频谱泄漏有了很大改善.分析了并行结构滤波器的实现方法以及可行性,在FPGA器件上对该算法实现并行设计,给出了硬件具体实现模块.从实验结果可以看出,这种改进滤波器实现结构的算法可以灵活地处理综合的面积和速度的约束关系,使最后的设计达到最优.
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| 关 键 词： | 积分滤波器 Verilog-HDL FPGA 并行结构 |
| 文章编号： | 1673-5196(2006)06-0089-04 |
| 收稿时间： | 2005-09-02 |
| 修稿时间： | 2005-09-02 |
A modified design of lowpass filter with FPGA by using parallel integral algorithm |
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| MA An-ren,DANG Cun-lu,LI Jun-guo,FAN Sheng-quan. A modified design of lowpass filter with FPGA by using parallel integral algorithm[J]. Journal of Lanzhou University of Technology, 2006, 32(6): 89-92 |
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| Authors: | MA An-ren DANG Cun-lu LI Jun-guo FAN Sheng-quan |
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| Affiliation: | 1. College of Electrical and Information Engineering, Lanzhou Univ. of Tech. , Lanzhou 730050, China; 2. College of Electrical Engineering, Northwest University for Nationalities, Lanzhou 730000, China |
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| Abstract: | Lowpass filter designed with parallel integral algorithm was analyzed theoretically and improved by supplementing Hamming window into it,so that its frequency spectrum leakage was greatly improved.Further,the implementation method and feasibility of a filter with parallel architecture were analyzed,and this algorithm was used to realize parallel.Third,a hardware design on FPGA,having given an embodied module of hardware.It could be seen from the experiment result that,with the help of this algorithm for modifying the architecture of filter,the comprehension constraint relationship between area and speed could be flexibly treated,so that made the final design optimal. |
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| Keywords: | integral filter Verilog-HDL FPGA parallel architecture |
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