三值光学计算机解码器中并行感光阵列的设计

介绍了针对数千位的三值光学计算机解码器而设计的一款并行感光阵列。在整体规划上, 采用了将16个感光单元电路集成为一个感光模块, 再用多个感光模块拼接成实用的并行感光阵列之策略. 设计的感光单元电路将三值光学处理器一个像素输出的光信号转换成对应的电信号, 一个感光模块将三值光学处理器16个像素输出的光信号并行转换成对应的电信号,感光阵列将三值光学处理器的数千个像素输出的光信号并行转换成对应的电信号. 设计的感光模块封装外形解决了拼装成大规模感光阵列的问题. 该模块为三值光学计算机提供了一个成本低、方便维护及更换的并行光电器件. 最后介绍了对感光模块中电路的实验研究和对模块外形拼接性能的实物样板测试, 实验证实了所设计电路的功能有效性和性能稳定性, 样板测试表明该设计的感光模块封装外形适于拼接.

Design of parallel photosensitive array in ternary optical computer decoder

This paper discusses the design of a parallel photosensitive array for a decoder in a thousand-bit ternary optical computer. The strategy is to make a parallel module with 16 photosensitive pixels and circuits, and joint some modules into a utility parallel photosensitive array. Each module transforms 16 three-state optical signals from a ternary optical processor into 16 two-state electoral signals concurrently. A parallel photosensitive array then transforms thousands of three-state optical signals into electoral signals concurrently. Thus the module becomes a low-cost, maintainable and replaceable parallel photoelectric device. Experiments are performed to verify stability and correctness of the photosensitive pixels and their circuits. A test on four samples of the module outline shows that splicing a large-scaled photosensitive array with lots of modules is convenient.