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双机容错系统中基于FPGA容错控制器的设计
引用本文:魏志明,李文新,马动涛,王彬. 双机容错系统中基于FPGA容错控制器的设计[J]. 科学技术与工程, 2009, 9(15)
作者姓名:魏志明  李文新  马动涛  王彬
作者单位:兰州物理研究所,兰州,730000;西北工业大学,西安,710072
摘    要:根据双机容错系统故障检测和诊断、仲裁技术的常用方案及特点,结合某在研双机容错系统,提出了一种基于FPGA容错控制器的设计方案.仲裁模块作为容错控制器的核心模块,可根据双机工作的监测信号负责完成主备机切换功能.为了实现软硬件心跳故障监控功能,在FPGA内嵌了WTD模块.同时,全局时钟引用于各个模块后,良好消除了输出信号的毛刺问题.实验结果表明, 该设计方案满足系统要求,可靠性较好.

关 键 词:双模容错计算机  FPGA  故障检测与诊断  仲裁

Design of the Fault_tolerant Controller Based on FPGA in the Dual Fault-tolerant System
WEI Zhi-ming,LI Wen-xin,MA Dong-tao,WANG Bin. Design of the Fault_tolerant Controller Based on FPGA in the Dual Fault-tolerant System[J]. Science Technology and Engineering, 2009, 9(15)
Authors:WEI Zhi-ming  LI Wen-xin  MA Dong-tao  WANG Bin
Affiliation:Lanzhou Physics Institute;Lanzhou 730000;P.R.China;Northwestern Polytechnical University1;Xi'an 710072;P.R.China
Abstract:According to various methods in common use of dual fault-tolerant system and combined with a developing devices,a scheme of the dual fault_tolerant controller is proposed based on FPGA .As the core module of the fault_tolerant controller,the arbitrator mechanism is in charge of achieving the switches between the host and the backup machine. Watchdog is designed in FPGA for inpecting heartbeat of sofeware and hardware . And also high eliminating the output signals' burrs by using FPGA's inner clock signal. T...
Keywords:FPGA
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