| 基于BCD码的模10i相位累加器DDS设计 |
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| 引用本文： | 高明,吴晓新. 基于BCD码的模10i相位累加器DDS设计[J]. 南通大学学报(自然科学版), 2006, 5(4): 93-96 |
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| 作者姓名： | 高明 吴晓新 |
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| 作者单位： | 南通大学,电气工程学院,江苏,南通,226007 |
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| 摘 要： | 为了简化DDS系统频率控制字的计算处理,提出基于BCD码模10i相位累加器的DDS设计方案.详细介绍了BCD码相位累加器的设计以及应用于DDS系统的相关问题.由于BCD码逐位计算需使用同步多时钟系统,其工作速度较慢,所以它适合应用于频率范围在数MHz以下的DDS信号发生器的单片式设计.
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| 关 键 词： | 直接数字频率综合技术(DDS) 模10~i相位累加器 BCD码 VHDL |
| 文章编号： | 1673-2340（2006）04-0093-04 |
| 收稿时间： | 2006-05-08 |
| 修稿时间： | 2006-05-08 |
The DDS Design of Modulus 10 Phase Accumulator Based on BCD Code |
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| GAO Ming,WU Xiao-xin. The DDS Design of Modulus 10 Phase Accumulator Based on BCD Code[J]. Journal of Nantong University (Natural Science Edition), 2006, 5(4): 93-96 |
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| Authors: | GAO Ming WU Xiao-xin |
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| Abstract: | In order to simplify the computational processing of the frequency control words of the DDS system,this paper puts forward two designs,both taking advantages of modulus 10 phase accumulator.Merits and drawbacks of these two designs are discussed.In this paper,the design of BCD code phase accumulator and its applications in DDS systems are illustrated in detail.The BCD code needs the synchronous multi-clocks system;therefore,it works step by step at a low speed and can be adapted to the single-chip design of DDS signal generator whose frequency is under 10MHz. |
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| Keywords: | Direct Digital Frequency Synthesis(DDS) modulus 10 phase accumulator BCD code VHDL |
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