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一种新型低kickback噪声的闩锁型比较器
引用本文:张信,于敦山,盛世敏.一种新型低kickback噪声的闩锁型比较器[J].北京大学学报(自然科学版),2006,42(5):681-684.
作者姓名:张信  于敦山  盛世敏
作者单位:北京大学信息科学技术学院微电子研究所,北京,100871;E-mail: zhangxin@ime.pku.edu.cn
基金项目:Acknowledgement Thanks to Teacher Han Lin for her great help during the use of several EDA tools.
摘    要:提出了一种新的闩锁型比较器结构。由于它的低kickback噪声特性,此比较器特别适合应用于差分模拟-数字转换器(ADCs)。电路采用标准 0.35μm 的工艺进行模拟,结果显示此比较器在 3.3V 电源下采样频率为 400Ms/s,并且kickback噪声比传统结构减少了88%。

关 键 词:模拟-数字转换  平行ADC  高速比较器  kickback噪声  
收稿时间:2005-12-09
修稿时间:2005-12-092006-03-02

A Novel Latched Comparator with Low Kickback Noise
ZHANG Xin,YU Dunshan,SHENG Shimin.A Novel Latched Comparator with Low Kickback Noise[J].Acta Scientiarum Naturalium Universitatis Pekinensis,2006,42(5):681-684.
Authors:ZHANG Xin  YU Dunshan  SHENG Shimin
Institution:Institute of Microelectronics, School of Electronics Engineering and Computer Science, Peking University, Beijing,100871; E-mail: zhangxin@ime.pku.edu.cn
Abstract:A new latched comparator architecture was proposed. Because of its very low kickback noise feature, it is especially suitable for differential analog-to-digital converters (ADCs). Simulated results of the proposed circuit in a 0.35μm standard CMOS technology show that this comparator achieves a sampling speed of 400 Ms/s at 3.3-V supply, with a kickback noise 88% lower than conventional schemes.
Keywords:analog-to-digital(A/D) conversion  parallel ADC  high-speed comparators  kickback noise
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