A high-level synthesis based dual-module redundancy with multi-residue detection （DMR-MRD） fault-tolerant method for on-board processing satellite communication systems

On board processing （OBP） satellite systems have obtained more and more attentions in recent years because of their high efficiency and performance.However,the OBP transponders are very sensitive to the high energy particles in the space radiation environments.Single event upset （SEU） is one of the major radiation effects,which influences the satellite reliability greatly.Triple modular redundancy （TMR） is a classic and efficient method to mask SEUs.However,TMR uses three identical modules and a comparison logic,the circuit size becomes unacceptable,especially in the resource limited environments such as OBP systems.Considering that,a new SEU-tolerant method based on residue code and high-level synthesis （HLS） is proposed,and the new method is applied to FIR filters,which are typical structures in the OBP systems.The simulation results show that,for an applicable HLS scheduling scheme,area reduction can be reduced by 48.26％ compared to TMR,while fault missing rate is 0.15％.     

Photoshop图像领域中的色彩管理

我们应用各种图像软件的时候，经常会遇到关于图像色彩的问题．在这篇文章里就RGB色彩空间、CMYK色彩空间、Lab色彩空间、HLS色彩空间等色彩空间的分析和使用来阐明Photoshop中的色彩管理．     

Register Allocation Algorithm for High-Level Circuit Synthesis for Improved Testability

Register allocation in high-level circuit synthesis is important not only for reducing area, delay, and power overheads, but also for improving the testability of the synthesized circuits. This paper presents an improved register allocation algorithm that improves the testability called weighted graph-based balanced register allocation for high-level circuit synthesis. The controllability and observability of the registers and the self-loop elimination are analyzed to form a weighted conflict graph, where the weight of the edge between two nodes denotes the tendency of the two variables to share the same register. Then the modified desaturation algorithm is used to dynamically modify the weights to obtain a final balanced register allocation which improves the testability of the synthesized circuits. Tests on some benchmarks show that the algorithm gives a higher fault coverage than other algorithms with less area overhead and even less time delay.     

一种改进的ISODATA算法及在彩色荧光图像中的应用

根据石油地质部门的实际需要, 提出了一种改进的ISODATA聚类算法，并以此对彩色荧光图像进行分割.该算法首先从统计模式识别的角度出发，将彩色图像各个像素点的色彩分量转换到更符合人视觉的HLS空间；并在进行自组织迭代前，对样本空间进行初分，为取得更好的聚类效果创造了条件；最后，在进行相似度运算时，根据不同的分割需要分别对色度、亮度、饱和度三个分量进行了加权处理，获得了较好的分割效果.     

基于改进K-均值聚类的图像分割算法研究

为了实现彩色图像的准确分割,研究了在HLS颜色空间中基于优化初始中心的加权K-均值彩色图像聚类算法.首先对大样本的目标颜色进行数理统计,获取优化的初始聚类中心,从而实现准确分类和避免K-均值容易陷入局部最优的问题;然后在HLS颜色空间中引入加权欧氏距离来度量对象间的相关性,通过调整系数使对象不同的颜色属性内在特征得以充分利用.实验证明,该算法在保持K-均值聚类简洁、收敛速度快的同时能产生更好的聚类效果,实现彩色图像的快速准确分割.     

高级综合中分配的一种新方法─—最小生命周期边缘算法

提出了高级综合中最小生命周期的分配算法，通过对存储和功能单元分配的统筹考虑，使分配达到了很好的效果．采用变量生命周期前端和末端交替选取的迭代方法，理论和实例上对于只有一种功能单元类型的ＣＤＦＧ提高了算法速度和分配效果．     

基于车牌颜色变化剧烈特征的彩色车牌定位新方法

车牌定位是车牌识别的首要问题,目前已实现的定位主要局限于灰度图像,且定位效果较易受阴影和光照等条件的影响.为解决此问题,笔者提出加强车牌区域、找出变化点并扩大的方法.该方法首先根据HLS模型对车牌区域进行了颜色加强,然后根据车牌区域颜色变化频率快、车牌宽高信息等特征对车牌进行判断.该方法定位准确率高,适于各种光照条件.     

A Novel Testability-Oriented Data Path Scheduling Scheme in High-Level Synthesis

Scheduling is an important step in high-level synthesis and can greatly influence the testability of the synthesized circuits. This paper presents an efficient testability-improved data path scheduling scheme based on mobility scheduling, in which the scheduling begins from the operation with least mobility. In our data path scheduling scheme, the lifetimes of the I/O variables are made as short as possible to enlarge the possibility of the intermediate variables being allocated to the I/O registers. In this way, the controllability/observability of the intermediate variables can be improved. Combined with a weighted graph-based register allocation method, this scheme can obtain better testability. Experimental results on some benchmarks and example circuits show that the proposed scheme can get higher fault coverage compared with other scheduling schemes at little area overhead and even less time delay.