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This paper presents an on-chip measurement circuit to measure multi-giga bit cycle-to-cycle jitter based on the vernier oscillator (VO), which is inherited from the famous vernier delay line. The calibration method is also given. The circuit adopts a differential digital controlled delay element, which makes the circuit flexible in adjusting the measurement resolution, and a highly sensitive phase capturer, which makes the circuit able to measure jitters in pico-second range. The parallel structure makes it possible to measure consecutive cycle-to-cycle jitters. The performance of the circuit was verified via simulation with SMIC 0.18 μm process. During simulation under the clock with the period of 750 ps, the error between the measured RMS jitter and the theoretical RMS jitter was just 2.79 ps. Monte Carlo analysis was also conducted. With more advanced technology, the circuit can work better. This new structure can be implemented in chips as a built-in self-test IP core for testing jitter of PLL or other clocks.  相似文献   
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高校科研队伍的主力军分散在各系(院),为了充分发挥各系(院)教师在科研中的主导作用,系(院)党总支必须增大参与科研管理工作的力度,充分发挥组织保证,思想保证和后勤保障(以下简称为“三保”)作用,对此问题,高校各级科研管理部门及其负责人应该达成共识。一、党总支主要负责人要与主任(院长)密切配合为科研发挥“三保”作用1.党总支参与科研管理是应有之责。过去有一种观点,认为党总支过问科研工作,参与科研管理是“不务正业”,这种观点当然是错误的。纵观当今世界的发展现状,随着科技成果的快速商品化和产业化,引起…  相似文献   
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