基于FPGA的E2PROM读写控制设计及实现

介绍了12C总线的工作原理以及时序要求．利用FPGA强大的逻辑控制功能和VHDL语言的灵活性，对E^2PROM的I^2C总线控制器进行了设计．采用模块化和状态机相结合的设计方法，给出了各个模块的设计思路．利用QUARTUSⅡ软件对设计程序进行了仿真，并将程序下载到实验开发板上对系统进行了验证，给出了仿真和验证的结果．     

基于FPGA/CPLD的光纤陀螺仪的温度信号采集

介绍了一种光纤陀螺仪（FOG）的温度信号采集方案，该方案利用可编程控制器件（FPGA／CPLD）同模拟开关相结合实现了对多路陀螺温度信号进行轮换采集和处理，对传统数字信号处理必须采用多路并行采集电路的方法加以改进．该方案稳定性高，造价低，灵活性强，并已运用到实际，取得良好效果．     

基于FPGA的高分辨率贝尔CFA插值算法的设计与实现

实现了基于FPGA的双线性CFA插值算法。该算法的处理对象是每个像素为8 bit的XGA@15 Hz的Bayer模板数据,目的是能得到每个像素是24 bit的XGA@15 Hz的彩色图像数据。输入的数据先进入缓存模块,缓存模块是由FPGA内部的双口的RAM构成,从缓存中输出的数据被分成奇行组和偶行组,然后奇行组的数据经选择器进入奇行奇列运算块和奇行偶列运算块,偶行组的数据经选择器进入偶行奇列运算块和偶行偶列运算块,最后在插值控制模块的作用下,各运算块处理的数据经输出选择器输出。     

Dynamically Reconfigurable Encryption System of the AES

Reconfigurable computing has grown to become an important and large field of research, it offers advantages over traditional hardware and software implementations of computational algorithms. The Advanced Encryption Standard （AES） algorithm is widely applied in government department and commerce. This paper analyzed the AES algorithms with different cipher keys, adopted a novel key scheduler that generated the round key real-time, proposed a dynamically reconfigurable encryption system which supported the AES algorithm with different cipher keys, and designed the architecture of the reconfigurable system. The dynamically reconfigurable AES system had been realized on FPGA. The result proves that the reconfigurable AES system is flexible, lower cost and high security level.     

Design of an MRI quadrature-data acquisition card

A design of a quadrature-data acquisition card based on peripheral component interconnect (PCI) bus for mini-type magnetic resonance imaging (MRI) system is reported. It uses two high speed analog-to-digital converters (ADCs) to sample the MRI signals and two static random access memories (SRAMs) to store the data which will be read to the computer by PCI bus after sampling. All the logic control signals on the card are generated by the field programmable gate array (FPGA). The software Foundation3.1 is used to design the FPGA and achieve useful result after simulating and implementing. The card has some merits that normal commercial cards do not have. For example, the sampling parameters can be varied according to different pulse sequences.     

A New Algorithm for On-Line Handwriting Signature Verification Based on Evolutionary Computation

The paper proposes an on-line signature verification algorithm, through which test sample and template signatures can be optimizedly matched, based on evolutionary computation （EC）. Firstly, the similarity of signature curve segment is defined, and shift and scale transforms are also introduced due to the randoness of on-line signature. Secondly, this paper puts forward signature verification matching algorithm after establishment of the mathematical model. Thirdly, the concrete realization of the algorithm based on EC is discussed as well. In addition, the influence of shift and scale on the matching result is fully considered in the algorithm. Finally, a computation example is given, and the matching results between the test sample curve and the template signature curve are analyzed in detail, The preliminary experiments reveal that the type of signature verification problem can be solved by EC.     

基于FPGA的电子密码锁的设计

针对基于单片机的电子密码锁的不足之处,介绍了一种基于FPGA的电子密码锁的设计方法。采用VHDL语言使用自顶而下的方法对系统进行了描述,并在FPGA芯片CycloneEP1C6Q240C8上实现。设计充分利用了FPGA的资源可编程特性,可高效率的对系统进行升级与改进。本文设计的密码锁可设置任意位密码,比一般的四位密码锁具有更高的安全可靠性,应用前景十分良好。     

基于FPGA的数字传输抖动损伤的可控化实现方法

为了在室内模拟出一套可控的抖动损伤加载系统,省去数字传输网的各种设备室外调试耗费的大量的人力、时间和经费,本文首先简要分析了数字传输抖动产生的原因以及其对网络性能的影响.其次提出了利用正弦调制的方法进行抖动模拟,给出了双直接数字频率合成器(DDS)结构的实现方案.最后基于现场可编程逻辑阵列(FPGA)实现了中心频率、抖动频率和抖动峰-峰值均可控的抖动模拟算法.研究表明,采用双DDS结构实现抖动模拟方法切实可行,具有一定的使用价值.该算法已经在信道模拟器对数字传输的损伤加载模拟中得到应用,效果良好.     

英语存现结构对生成语法理论的发展和验证

英语存现结构因其特殊属性在参与语法理论构建和验证理论的解释性中具有重要作用。通过分析格理论中名词词组的赋格,特征核查理论,合并与移动的优先问题及局部经济性原则,多重主语结构,句法推导等方面存现结构的特殊地位,论证了存现结构研究的重要性。