带浮点放大器的CPLD数据采集系统设计

采用浮点放大器和CPLD设计了多通道数据采集系统.其浮点放大器根据输入信号范围,放大适当的倍数,保证了数据采集系统的动态测量范围;CPLD具有丰富的内部资源和大量I/O管脚,处理速度快,可实现灵活多变的控制流程;双端口RAM作为A/D转换与CPU之间的桥梁,为高速数据吞吐提供了有力的硬件支持;结合以上几方面的优势,系统总体上实现了高速、高精度数据采集.     

低成本SoC平台MPEG-4 AAC解码器优化策略

提出了在低成本SoC平台的软件优化策略,包括基于统计分析的浮点到定点转换策略和面向性能优化的片上存储器容量定制策略,在此基础上针对计算密集性应用提出了完整的优化方法。通过实现MPEG-4 AAC实时解码,表明该优化策略在性能和成本方面的有效性。这一策略与方法也适合其他DSP应用。     

网络最短路径算法的改进及实现

从节约存储空间和提高运算速度方面对Dijkstra最短路径算法进行了改进．定义新的节点类来高效存储网络的拓扑信息。节省了计算机存储空间；采用满二叉堆数据结构对节点进行排序并选取最短路径节点。大大提高算法效率，仿真例子表明．对于某些网络结构．改进算法能把传统Dijkstra算法的时间复杂度由原来的O(N^2)近似降至o(N)。     

Optimization of block-floating-point realizations for digital controllers with finite-word-length considerations

The closed-loop stability issue of finite-precision realizations was investigated for digital control-lers implemented in block-floating-point format. The controller coefficient perturbation was analyzed resultingfrom using finite word length (FWL) block-floating-point representation scheme. A block-floating-point FWL closed-loop stability measure was derived which considers both the dynamic range and precision. To facilitate the design of optimal finite-precision controller realizations, a computationally tractable block-floating-point FWL closed-loop stability measure was then introduced and the method of computing the value of this measure for a given controller realization was developed. The optimal controller realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach was adopted to solve the resulting optimal realization problem. A numerical example was used to illustrate the design procedure and to compare the optimal controller realization with the initial realization.     

龙格—库塔法和传输矩阵法求解非均匀长光纤光栅问题的比较

通过对几个具体的例子，分析研究龙格-库塔法和传输矩阵法求解非均匀光纤光栅的异同。发现在计算过程中矩阵法的运算速度快，精确度高，特别适合求解非均匀长光栅问题。而龙格-库塔法的计算结果则受步长的影响，当步长取得足够小时，两种方法计算结果基本吻合。