Extraction and DNA Digestion of 5′-Phosphodiesterase from Malt Root

This study investigated the extraction of 5＇-phosphodiesterase from malt root and the degradation of nucleic acids by this enzyme. The extraction used grade precipitation with ammonium sulfate and enzymatic hydrolysis. Samples were assayed using the modified Bradford method and high performance liquid chromatography. The results show that 5＇-phosphodiesterase is isolated by grade precipitation with 30% and 80% saturation of ammonium sulfate and can be utilized to degrade deoxyribonucleic acid. The hydrolysate has four kinds of deoxynucleotides： 5＇-dCMP, 5＇-dTMP, 5＇-dAMP, and 5＇-dGMP. The optimum reaction temperature is 70℃, and the optimum pH is 5.5-6.0 for the reaction. The percentage of deoxynucleotides indicated by the China Pharmacopoeia （2000 edition） in the product is over 70%. The extraction of 5＇-phosphodiesterase from malt root is shown to be possible and economical. Products from the enzYmatic hydrolysate of DNA meet the pharmacopoeia.     

Ethernet controller SoC design and its low-power DFT considerations

In this paper, an Ethernet controller SoC solution and its low power design for testability (DFT) for information appliances are presented. On a single chip, an enhanced one-cycle 8-bit micro controller unit (MCU), media access control (MAC) circuit and embedded memories such as static random access memory (SRAM), read only memory (ROM) and flash are all integrated together. In order to achieve high fault coverage, at the same time with low test power, different DFT techniques are adopted for different circuits: the scan circuit that reduces switching activity is implemented for digital logic circuits; BIST-based method is employed for the on-chip SRAM and ROM. According to the fault-modeling of embedded flash, we resort to a March-like method for flash built in self test (BIST). By all means above, the result shows that the fault coverage may reach 97%, and the SoC chip is implemented successfully by using 0.25 μm two-poly four-metal mixed signal complementary metal oxide semiconductor (CMOS) technology, the die area is 4.8×4.6 mm2. Test results show that the maximum throughput of Ethernet packets may reach 7 Mb · s⁻¹. Biography: ZHENG Zhaoxia (1975–), female,Ph.D. candidate, Lecturer, research direction: system one chip (SOC) integrated circuits design.     

长喙毛茛泽泻的研究进展

综述了国家一级保护野生植物长喙毛茛泽泻的生物学特性,生殖生物学,生态学及其致濒机制和保护措施等方面的研究进展.     

外贸函电的特点及翻译问题

随着我国改革开放的不断深入及对外商务活动的日益频繁,外贸函电越来越受到人们的重视和广泛应用。本文结合商务活动的实例,从五个方面分析了外贸函电的语言风格及有关翻译问题。     

限压式变量叶片泵动态特性分析

建立了限压式变量叶片泵液压系统的动态模型。利用Simulink仿真软件分析了叶片泵在阶跃输入下,从一个稳定状态到另一个稳定状态的自动调节过程,并对影响其动态响应特性的诸因素进行模拟计算分析。     

Dg16新鞍形填料流体力学和传质特性

对Dg16新鞍形塑料填料的流体力学和传质特性进行了实测和对比研究,并与尺寸相同或相近的拉西环、矩鞍形和弧鞍形等填料的流体力学和传质性能进行了比较,同时与Onda关联式计算值进行了对比．研究结果表明;Dg16新鞍形填料具有优良的流体力学特性和传质特性;该填料层压降、填料因子、液泛气速和气相总传质单元高度的计算结果与实测结果吻合,其中最大偏差为±17％     

黄山松空间分布格局的研究

以样地调查数据为基础,应用离散分布的理论拟合、聚集强度指数的测定和格局纹理的分析方法,对不同群落中黄山松种群空间分布格局进行拟合分析。结果表明：黄山松幼年期趋于聚集分布,以后逐渐过渡到随机分布。主要由于种内、种间竞争及光照等因子的作用。而不同林型空间分布格局形成也与土壤、光照、海拔等因子影响有关。     

碳酸盐台地高水位溢流沉积研究

碳酸盐台地高水位溢流是指在海平面高水位期,台地沉积物被搬运到斜坡及较深水盆地中沉积下来所形成的沉积体。一般发育在镶边陆架型台地或平顶台地低纬度暖水区,它的形成受台地类型、台地斜坡坡度、海平面变化幅度等要素的制约。     

等离子体电枢电磁轨道炮电枢电弧长度的测量

对用Ｂ－ｄｏｔ磁探针测量三维等离子体电枢电弧长度的原理进了理论分析,给出了根据记录的磁探针信号波形计算等离子体电枢电弧长度的判据．通过实测的数据对判据的准确性进行了实验分析与验证．     

Cu/TiO_2超晶格的拉曼光谱

用拉曼光谱对Cu／TiO2超晶格微结构进行研究．结果表明,TiO2的声子振动被限制在自身层内,形成准二维声子振动体系．对类体模和界面模进行分析表明,TiO2和Cu在界面发生键合,形成短程有序化合物,其振动频率为91cm－1．