Single-crystal metallic nanowires and metal/semiconductor nanowire heterostructures

Substantial effort has been placed on developing semiconducting carbon nanotubes and nanowires as building blocks for electronic devices--such as field-effect transistors--that could replace conventional silicon transistors in hybrid electronics or lead to stand-alone nanosystems. Attaching electric contacts to individual devices is a first step towards integration, and this step has been addressed using lithographically defined metal electrodes. Yet, these metal contacts define a size scale that is much larger than the nanometre-scale building blocks, thus limiting many potential advantages. Here we report an integrated contact and interconnection solution that overcomes this size constraint through selective transformation of silicon nanowires into metallic nickel silicide (NiSi) nanowires. Electrical measurements show that the single crystal nickel silicide nanowires have ideal resistivities of about 10 microOmega cm and remarkably high failure-current densities, >10(8) A cm(-2). In addition, we demonstrate the fabrication of nickel silicide/silicon (NiSi/Si) nanowire heterostructures with atomically sharp metal-semiconductor interfaces. We produce field-effect transistors based on those heterostructures in which the source-drain contacts are defined by the metallic NiSi nanowire regions. Our approach is fully compatible with conventional planar silicon electronics and extendable to the 10-nm scale using a crossed-nanowire architecture.     

Self-directed growth of molecular nanostructures on silicon

Advances in techniques for the nanoscale manipulation of matter are important for the realization of molecule-based miniature devices with new or advanced functions. A particularly promising approach involves the construction of hybrid organic-molecule/silicon devices. But challenges remain--both in the formation of nanostructures that will constitute the active parts of future devices, and in the construction of commensurately small connecting wires. Atom-by-atom crafting of structures with scanning tunnelling microscopes, although essential to fundamental advances, is too slow for any practical fabrication process; self-assembly approaches may permit rapid fabrication, but lack the ability to control growth location and shape. Furthermore, molecular diffusion on silicon is greatly inhibited, thereby presenting a problem for self-assembly techniques. Here we report an approach for fabricating nanoscale organic structures on silicon surfaces, employing minimal intervention by the tip of a scanning tunnelling microscope and a spontaneous self-directed chemical growth process. We demonstrate growth of straight molecular styrene lines--each composed of many organic molecules--and the crystalline silicon substrate determines both the orientation of the lines and the molecular spacing within these lines. This process should, in principle, allow parallel fabrication of identical complex functional structures.     

Superconductivity in doped cubic silicon

Although the local resistivity of semiconducting silicon in its standard crystalline form can be changed by many orders of magnitude by doping with elements, superconductivity has so far never been achieved. Hybrid devices combining silicon's semiconducting properties and superconductivity have therefore remained largely underdeveloped. Here we report that superconductivity can be induced when boron is locally introduced into silicon at concentrations above its equilibrium solubility. For sufficiently high boron doping (typically 100 p.p.m.) silicon becomes metallic. We find that at a higher boron concentration of several per cent, achieved by gas immersion laser doping, silicon becomes superconducting. Electrical resistivity and magnetic susceptibility measurements show that boron-doped silicon (Si:B) made in this way is a superconductor below a transition temperature T(c) approximately 0.35 K, with a critical field of about 0.4 T. Ab initio calculations, corroborated by Raman measurements, strongly suggest that doping is substitutional. The calculated electron-phonon coupling strength is found to be consistent with a conventional phonon-mediated coupling mechanism. Our findings will facilitate the fabrication of new silicon-based superconducting nanostructures and mesoscopic devices with high-quality interfaces.     

The Novel Semiconductor Nanowire Heterostructures

1 Results If one-dimensional heterostructures with a well-defined compositional profile along the wire radial or axial direction can be realized within semiconductor nanowires, new nano-electronic devices,such as nano-waveguide and nano-capcipator, might be obtained. Here,we report the novel semiconducting nanowire heterostructures:(1) Si/ZnS side-to-side biaxial nanowires and ZnS/Si/ZnS sandwich-like triaxial nanowires[1],(2) Ga-Mg3N2 and Ga-ZnS metal-semiconductor nanowire heterojunctions[2-3]and (3) ...     

Strong quantum-confined Stark effect in germanium quantum-well structures on silicon

Silicon is the dominant semiconductor for electronics, but there is now a growing need to integrate such components with optoelectronics for telecommunications and computer interconnections. Silicon-based optical modulators have recently been successfully demonstrated; but because the light modulation mechanisms in silicon are relatively weak, long (for example, several millimetres) devices or sophisticated high-quality-factor resonators have been necessary. Thin quantum-well structures made from III-V semiconductors such as GaAs, InP and their alloys exhibit the much stronger quantum-confined Stark effect (QCSE) mechanism, which allows modulator structures with only micrometres of optical path length. Such III-V materials are unfortunately difficult to integrate with silicon electronic devices. Germanium is routinely integrated with silicon in electronics, but previous silicon-germanium structures have also not shown strong modulation effects. Here we report the discovery of the QCSE, at room temperature, in thin germanium quantum-well structures grown on silicon. The QCSE here has strengths comparable to that in III-V materials. Its clarity and strength are particularly surprising because germanium is an indirect gap semiconductor; such semiconductors often display much weaker optical effects than direct gap materials (such as the III-V materials typically used for optoelectronics). This discovery is very promising for small, high-speed, low-power optical output devices fully compatible with silicon electronics manufacture.     

激光器的新成员--量子点激光器

量子点异质结构是窄带隙材料以纳米尺度连贯插入单晶体点阵中．这些微小结构为改进异质结构激光器的基本原理以及拓宽它们的应用提供了独特的平台．与量子阱激光器相比，量子点激光器因具有delta样的电子态密度而具有优异的光激发特性．近年来半导体量子点激光器的进展已经达到了一个新的水平，在某些最重要的应用方面，量子点激光器已经超过了量子阱激光器的一些关键特性．     

中型氧化硅簇的性质及其在纳米硅线生长中的作用

应用量子化学计算法和前线轨道理论研究了中型氧化硅簇体系的结构和反应性，并从该理论研究出发，对一种新型的可以高产量生长纳米硅线的实验技术，即氧化硅辅助生长方法的生长机制做了相应的探讨。初步得出了富含硅的氧化硅簇和类似SiO配比的氧化硅簇在纳米硅线的成核和生长中起到了重要作用。     

A guest-free germanium clathrate

The challenges associated with synthesizing expanded semiconductor frameworks with cage-like crystal structures continue to be of interest. Filled low-density germanium and silicon framework structures have distinct properties that address important issues in thermoelectric phonon glass-electron crystals, superconductivity and the possibility of Kondo insulators. Interest in empty framework structures of silicon and germanium is motivated by their predicted wide optical bandgaps of the same magnitude as quantum dots and porous silicon, making them and their alloys promising materials for silicon-based optoelectronic devices. Although almost-empty Na(1-x)Si136 has already been reported, the synthesis of guest-free germanium clathrate has so far been unsuccessful. Here we report the high-yield synthesis and characteristics of germanium with the empty clathrate-II structure through the oxidation of Zintl anions in ionic liquids under ambient conditions. The approach demonstrates the potential of ionic liquids as media for the reactions of polar intermetallic phases.     

Growth of nanowire superlattice structures for nanoscale photonics and electronics

The assembly of semiconductor nanowires and carbon nanotubes into nanoscale devices and circuits could enable diverse applications in nanoelectronics and photonics. Individual semiconducting nanowires have already been configured as field-effect transistors, photodetectors and bio/chemical sensors. More sophisticated light-emitting diodes (LEDs) and complementary and diode logic devices have been realized using both n- and p-type semiconducting nanowires or nanotubes. The n- and p-type materials have been incorporated in these latter devices either by crossing p- and n-type nanowires or by lithographically defining distinct p- and n-type regions in nanotubes, although both strategies limit device complexity. In the planar semiconductor industry, intricate n- and p-type and more generally compositionally modulated (that is, superlattice) structures are used to enable versatile electronic and photonic functions. Here we demonstrate the synthesis of semiconductor nanowire superlattices from group III-V and group IV materials. (The superlattices are created within the nanowires by repeated modulation of the vapour-phase semiconductor reactants during growth of the wires.) Compositionally modulated superlattices consisting of 2 to 21 layers of GaAs and GaP have been prepared. Furthermore, n-Si/p-Si and n-InP/p-InP modulation doped nanowires have been synthesized. Single-nanowire photoluminescence, electrical transport and electroluminescence measurements show the unique photonic and electronic properties of these nanowire superlattices, and suggest potential applications ranging from nano-barcodes to polarized nanoscale LEDs.     

Coaxial silicon nanowires as solar cells and nanoelectronic power sources

Solar cells are attractive candidates for clean and renewable power; with miniaturization, they might also serve as integrated power sources for nanoelectronic systems. The use of nanostructures or nanostructured materials represents a general approach to reduce both cost and size and to improve efficiency in photovoltaics. Nanoparticles, nanorods and nanowires have been used to improve charge collection efficiency in polymer-blend and dye-sensitized solar cells, to demonstrate carrier multiplication, and to enable low-temperature processing of photovoltaic devices. Moreover, recent theoretical studies have indicated that coaxial nanowire structures could improve carrier collection and overall efficiency with respect to single-crystal bulk semiconductors of the same materials. However, solar cells based on hybrid nanoarchitectures suffer from relatively low efficiencies and poor stabilities. In addition, previous studies have not yet addressed their use as photovoltaic power elements in nanoelectronics. Here we report the realization of p-type/intrinsic/n-type (p-i-n) coaxial silicon nanowire solar cells. Under one solar equivalent (1-sun) illumination, the p-i-n silicon nanowire elements yield a maximum power output of up to 200 pW per nanowire device and an apparent energy conversion efficiency of up to 3.4 per cent, with stable and improved efficiencies achievable at high-flux illuminations. Furthermore, we show that individual and interconnected silicon nanowire photovoltaic elements can serve as robust power sources to drive functional nanoelectronic sensors and logic gates. These coaxial silicon nanowire photovoltaic elements provide a new nanoscale test bed for studies of photoinduced energy/charge transport and artificial photosynthesis, and might find general usage as elements for powering ultralow-power electronics and diverse nanosystems.     

Room-temperature ferromagnetic nanotubes controlled by electron or hole doping

Nanotubes and nanowires with both elemental (carbon or silicon) and multi-element compositions (such as compound semiconductors or oxides), and exhibiting electronic properties ranging from metallic to semiconducting, are being extensively investigated for use in device structures designed to control electron charge. However, another important degree of freedom--electron spin, the control of which underlies the operation of 'spintronic' devices--has been much less explored. This is probably due to the relative paucity of nanometre-scale ferromagnetic building blocks (in which electron spins are naturally aligned) from which spin-polarized electrons can be injected. Here we describe nanotubes of vanadium oxide (VO(x)), formed by controllable self-assembly, that are ferromagnetic at room temperature. The as-formed nanotubes are transformed from spin-frustrated semiconductors to ferromagnets by doping with either electrons or holes, potentially offering a route to spin control in nanotube-based heterostructures.     

Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices

Nanowires and nanotubes carry charge and excitons efficiently, and are therefore potentially ideal building blocks for nanoscale electronics and optoelectronics. Carbon nanotubes have already been exploited in devices such as field-effect and single-electron transistors, but the practical utility of nanotube components for building electronic circuits is limited, as it is not yet possible to selectively grow semiconducting or metallic nanotubes. Here we report the assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping. Gate-voltage-dependent transport measurements demonstrate that the nanowires can be predictably synthesized as either n- or p-type. These doped nanowires function as nanoscale field-effect transistors, and can be assembled into crossed-wire p-n junctions that exhibit rectifying behaviour. Significantly, the p-n junctions emit light strongly and are perhaps the smallest light-emitting diodes that have yet been made. Finally, we show that electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.     

Gallium-Catalyzed Silicon Oxide Nanowire Growth

Silicon oxide nanowires tend to assemble into various complex morphologies through a metalcatalyzed vapor-liquid-solid （VLS） growth process. This article summarizes our recent efforts in the controlled growth of silicon oxide nanowire assemblies by using molten gallium as the catalyst and silicon wafer, SiO powder, or silane （Sill4） as the silicon sources. Silicon oxide nanowire assemblies with morphologies of carrotlike, cometlike, gourdlike, spindlelike, badmintonlike, sandwichlike, etc. were obtained. Although the morphologies of the nanowire assemblies are temperatureand silicon source-dependent, they share similar structural and compositional features： all the assemblies contain a microscale spherical liquid Ga ball and a highly aligned, closely packed amorphous silicon oxide nanowire bunch. The Ga-catalyzed silicon oxide nanowire growth reveals several interesting new nanowire growth phenomena that expand our knowledge of the conventional VLS nanowire growth mechanism.     

Large disparity between gallium and antimony self-diffusion in gallium antimonide

The most fundamental mass transport process in solids is self-diffusion. The motion of host-lattice ('self-') atoms in solids is mediated by point defects such as vacancies or interstitial atoms, whose formation and migration enthalpies determine the kinetics of this thermally activated process. Self-diffusion studies also contribute to the understanding of the diffusion of impurities, and a quantitative understanding of self- and foreign-atom diffusion in semiconductors is central to the development of advanced electronic devices. In the past few years, self-diffusion studies have been performed successfully with isotopically controlled semiconductor heterostructures of germanium, silicon, gallium arsenide and gallium phosphide. Self-diffusion studies with isotopically controlled GaAs and GaP have been restricted to Ga self-diffusion, as only Ga has two stable isotopes, 69Ga and 71Ga. Here we report self-diffusion studies with an isotopically controlled multilayer structure of crystalline GaSb. Two stable isotopes exist for both Ga and Sb, allowing the simultaneous study of diffusion on both sublattices. Our experiments show that near the melting temperature, Ga diffuses more rapidly than Sb by over three orders of magnitude. This surprisingly large difference in atomic mobility requires a physical explanation going beyond standard diffusion models. Combining our data for Ga and Sb diffusion with related results for foreign-atom diffusion in GaSb (refs 8, 9), we conclude that the unusually slow Sb diffusion in GaSb is a consequence of reactions between defects on the Ga and Sb sublattices, which suppress the defects that are required for Sb diffusion.     

Ge/Si nanowire heterostructures as high-performance field-effect transistors

Semiconducting carbon nanotubes and nanowires are potential alternatives to planar metal-oxide-semiconductor field-effect transistors (MOSFETs) owing, for example, to their unique electronic structure and reduced carrier scattering caused by one-dimensional quantum confinement effects. Studies have demonstrated long carrier mean free paths at room temperature in both carbon nanotubes and Ge/Si core/shell nanowires. In the case of carbon nanotube FETs, devices have been fabricated that work close to the ballistic limit. Applications of high-performance carbon nanotube FETs have been hindered, however, by difficulties in producing uniform semiconducting nanotubes, a factor not limiting nanowires, which have been prepared with reproducible electronic properties in high yield as required for large-scale integrated systems. Yet whether nanowire field-effect transistors (NWFETs) can indeed outperform their planar counterparts is still unclear. Here we report studies on Ge/Si core/shell nanowire heterostructures configured as FETs using high-kappa dielectrics in a top-gate geometry. The clean one-dimensional hole-gas in the Ge/Si nanowire heterostructures and enhanced gate coupling with high-kappa dielectrics give high-performance FETs values of the scaled transconductance (3.3 mS microm(-1)) and on-current (2.1 mA microm(-1)) that are three to four times greater than state-of-the-art MOSFETs and are the highest obtained on NWFETs. Furthermore, comparison of the intrinsic switching delay, tau = CV/I, which represents a key metric for device applications, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFETs.     

物理热蒸发法制备CdS/SiO2纳米线阵列和CdS纳米带

利用物理热蒸发法蒸发CdS和CdO的混合粉末，Si衬底表面发生了选择性刻蚀，并由此制备出CdS／SiO2纳米线阵列和CdS纳米带．研究了CdS／SiO2纳米线阵列的形成原因和CdS纳米带的生长过程，结果表明：CdS枝晶的生长对CdS／SiO2纳米线阵列的形成起到了非常重要的作用；CdS／SiO2纳米线阵列的形成符合“纳米电化学自组织机制”；CdS纳米带的生长过程为气一目过程．     

The influence of the surface migration of gold on the growth of silicon nanowires

Interest in nanowires continues to grow, fuelled in part by applications in nanotechnology. The ability to engineer nanowire properties makes them especially promising in nanoelectronics. Most silicon nanowires are grown using the vapour-liquid-solid (VLS) mechanism, in which the nanowire grows from a gold/silicon catalyst droplet during silicon chemical vapour deposition. Despite over 40 years of study, many aspects of VLS growth are not well understood. For example, in the conventional picture the catalyst droplet does not change during growth, and the nanowire sidewalls consist of clean silicon facets. Here we demonstrate that these assumptions are false for silicon nanowires grown on Si(111) under conditions where all of the experimental parameters (surface structure, gas cleanliness, and background contaminants) are carefully controlled. We show that gold diffusion during growth determines the length, shape, and sidewall properties of the nanowires. Gold from the catalyst droplets wets the nanowire sidewalls, eventually consuming the droplets and terminating VLS growth. Gold diffusion from the smaller droplets to the larger ones (Ostwald ripening) leads to nanowire diameters that change during growth. These results show that the silicon nanowire growth is fundamentally limited by gold diffusion: smooth, arbitrarily long nanowires cannot be grown without eliminating gold migration.     

无掩模选择性制备硅纳米线阵列及其光致发光

基于金属辅助硅化学刻蚀发展了一种无掩模选择性区域制备硅纳米线阵列的方法, 并利用该方法成功制备了图形化的硅纳米线阵列. 扫描电子显微镜(scanning electron microscope, SEM) 分析表明, 所制备的硅纳米线阵列是高质量的多孔微纳米结构, 并利用拉曼光谱仪研究了室温下硅纳米线阵列的光致发光特性. 结果表明, 硅纳米线阵列可实现有效的光发射, 发光波峰为663 nm. 该方法工艺简单、有效, 可潜在地应用于构筑硅基光电集成器件.     

Nanomechanics: response of a strained semiconductor structure

The nanomechanical properties of thin silicon films will become increasingly critical in semiconductor devices, particularly in the context of substrates that consist of a silicon film on an insulating layer (known as silicon-on-insulator, or SOI, substrates). Here we use very small germanium crystals as a new type of nanomechanical stressor to demonstrate a surprising mechanical behaviour of the thin layer of silicon in SOI substrates, and to show that there is a large local reduction in the viscosity of the oxide on which the silicon layer rests. These findings have implications for the use of SOI substrates in nanoelectronic devices.     

A III-V nanowire channel on silicon for high-performance vertical transistors

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.