Programmable computing with a single magnetoresistive element

The development of transistor-based integrated circuits for modern computing is a story of great success. However, the proved concept for enhancing computational power by continuous miniaturization is approaching its fundamental limits. Alternative approaches consider logic elements that are reconfigurable at run-time to overcome the rigid architecture of the present hardware systems. Implementation of parallel algorithms on such 'chameleon' processors has the potential to yield a dramatic increase of computational speed, competitive with that of supercomputers. Owing to their functional flexibility, 'chameleon' processors can be readily optimized with respect to any computer application. In conventional microprocessors, information must be transferred to a memory to prevent it from getting lost, because electrically processed information is volatile. Therefore the computational performance can be improved if the logic gate is additionally capable of storing the output. Here we describe a simple hardware concept for a programmable logic element that is based on a single magnetic random access memory (MRAM) cell. It combines the inherent advantage of a non-volatile output with flexible functionality which can be selected at run-time to operate as an AND, OR, NAND or NOR gate.     

用X射线衍射研究不同直径镍纳米线阵列的生长方向

大面积有序的不同直径的镍纳米线阵列在多孔氧化铝模板中通过直流电化学沉积制备,利用X光衍射研究了它们的生长方向。充分利用X光的特点对镍纳米线阵列的正反两面进行了测量,结果发现随着纳米线直径的增加,镍纳米线方向向由[110]方向开始向[111]方向转变。并且,利用高分辨透射电镜进行观测,结果发现和XRD得到的结果是一致的。这进一步说明了利用X光来研究纳米线的生长方向既简单又准确．该方法将在以后的纳米器件的研究中起到重要的作用,     

Synthesis of ordered Si nanowire arrays in porous anodic aluminum oxide templates

Highly ordered polycrystalline Si nanowire arrays were synthesized in porous anodic aluminum oxide (AAO) templates by the chemical vapor deposition (CVD) method. The morphological structure, the crystal character of Si nanowire arrays and the individual nanowire were analyzed by the transmission electron microscopy (TEM), scanning electron microscopy (SEM), atom force microscopy (AFM) and the X-ray diffraction spectrum (XRD), respectively. It is shown that most fabricated silicon nanowires (SiNWs) tend to be assembled parallelly in bundles and constructed with highly orientated arrays. This method provides a simple and low cost fabricating craftwork and the diameters and lengths of SiNWs can be controlled, the large area Si nanowire arrays can be achieved easily under such a way. The curling and twisting SiNWs are fewer than those by other synthesis methods.     

交流电沉积条件对沉积Ni纳米线的影响

采用恒压40V二次阳极氧化方法制备了阳极氧化铝(AAO)模板,模板的孔径均匀有序。在二次阳极氧化的基础上阶梯降低电压至10V,可有效减薄阻隔层,有利于Ni纳米线的交流电沉积。利用扫描电子显微镜和透射电子显微镜对AAO模板以及Ni纳米线的形貌进行表征。探索了阶梯降低氧化电压、电源滤波以及电沉积频率对沉积Ni纳米线的影响。结果表明,阶梯降低氧化电压、适当的频率以及滤波可以明显提高电沉积效果,得到比较均匀有序的Ni纳米线。     

Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices

Nanowires and nanotubes carry charge and excitons efficiently, and are therefore potentially ideal building blocks for nanoscale electronics and optoelectronics. Carbon nanotubes have already been exploited in devices such as field-effect and single-electron transistors, but the practical utility of nanotube components for building electronic circuits is limited, as it is not yet possible to selectively grow semiconducting or metallic nanotubes. Here we report the assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping. Gate-voltage-dependent transport measurements demonstrate that the nanowires can be predictably synthesized as either n- or p-type. These doped nanowires function as nanoscale field-effect transistors, and can be assembled into crossed-wire p-n junctions that exhibit rectifying behaviour. Significantly, the p-n junctions emit light strongly and are perhaps the smallest light-emitting diodes that have yet been made. Finally, we show that electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.     

Ge/Si nanowire heterostructures as high-performance field-effect transistors

Semiconducting carbon nanotubes and nanowires are potential alternatives to planar metal-oxide-semiconductor field-effect transistors (MOSFETs) owing, for example, to their unique electronic structure and reduced carrier scattering caused by one-dimensional quantum confinement effects. Studies have demonstrated long carrier mean free paths at room temperature in both carbon nanotubes and Ge/Si core/shell nanowires. In the case of carbon nanotube FETs, devices have been fabricated that work close to the ballistic limit. Applications of high-performance carbon nanotube FETs have been hindered, however, by difficulties in producing uniform semiconducting nanotubes, a factor not limiting nanowires, which have been prepared with reproducible electronic properties in high yield as required for large-scale integrated systems. Yet whether nanowire field-effect transistors (NWFETs) can indeed outperform their planar counterparts is still unclear. Here we report studies on Ge/Si core/shell nanowire heterostructures configured as FETs using high-kappa dielectrics in a top-gate geometry. The clean one-dimensional hole-gas in the Ge/Si nanowire heterostructures and enhanced gate coupling with high-kappa dielectrics give high-performance FETs values of the scaled transconductance (3.3 mS microm(-1)) and on-current (2.1 mA microm(-1)) that are three to four times greater than state-of-the-art MOSFETs and are the highest obtained on NWFETs. Furthermore, comparison of the intrinsic switching delay, tau = CV/I, which represents a key metric for device applications, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFETs.     

高密度、直立Co-Cu合金纳米线有序阵列的制备

利用一种简化的阳极氧化法制备出高度有序的氧化铝模板.利用电化学沉积法采用恒压直流电沉积模式在氧化铝模板的孔洞中制备了CoCu合金纳米线阵列.用SEM、TEM、EDS、XRD对样品进行了形貌、成分和微结构测试,结果显示,成功制备了大面积有序的CoCu合金纳米线阵列,纳米线尺寸均匀,直径约为70 nm,长度约为30⁴0μm,其长径比为40040μm,其长径比为400⁶00,纳米线的晶粒生长过程中晶面具有一定的择优取向性.     

电化学组装一维纳米线阵列温差电材料

低维温差电材料具有比块状温差电材料更高的优值,因而研制具有纳米线阵列结构的温差电材料对于提高材料的温差电转换效率具有重要意义.以具有纳米孔阵列结构的氧化铝多孔模板为阴极,在含有Bi 3、HTeO2 1的酸性溶液中,采用直流电沉积技术,通过在氧化铝多孔模板的纳米级微孔中沉积铋和碲,实现了一维纳米线阵列铋碲温差电材料的电化学组装.环境扫描电子显微镜(ESEM)和透射电子显微镜(TEM)的分折表明,电化学组装出的铋碲纳米线分布均匀,形状规则.铋碲纳米线的组成可方便地通过调整电沉积电位加以控制.     

电化学沉积Fe纳米线的结构

利用电沉积方法在多孔阳极氧化铝模板中制备了高度有序的Fe纳米线阵列.分别用场发射扫描电镜(FESEM)、高分辨场发射透射电镜(HRTEM),选区电子衍射(SAED)和X射线能谱仪(EDX)对样品进行了形貌、晶体结构及成分的表征.利用球链模型解释了纳米线底端的反磁化过程,分析了磁矩发生偏转的原因.结果表明:Fe纳米线直径约65 nm,长度约60μm,是具有(110)面择优取向多晶结构;在纳米线的中间部分,表面光滑,内部结构均匀,而在纳米线与电极接触的端点处由直径约8~15 nm的块状晶粒组成,并且块状结构之间存在明显的间隙.     

Tunnel field-effect transistors as energy-efficient electronic switches

Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.     

电沉积Ni纳米线阵列及其磁学性能研究

为了解决因受阳极氧化铝(AAO)孔道直径限制导致合成的金属纳米线尺寸单一、磁性受限的问题,采用二次阳极氧化法制备了不同孔径的阳极氧化铝(AAO)模板,依据模板辅助电沉积法,在不同孔径AAO模板内生长了Ni纳米线阵列,利用SEM,TEM,XRD和EDS等技术对制备的Ni纳米线阵列形貌、微观结构和成分进行表征,通过物理性能...     

制备参数对ZnO纳米线阵列特性的影响

针对目前水热法制备ZnO纳米线生长机制及成核过程中存在的一些模糊问题,利用水热法制备了一维ZnO纳米线阵列,研究了ZnO纳米线生长过程中反应液浓度、生长时间、反应压力、退火条件等实验参数对ZnO纳米线阵列的形貌、微结构及光电特性的影响,讨论了纳米线生长的成核机制及生长机理.研究结果对制备高质量一维ZnO半导体纳米线阵列并将其应用于微纳及光电子器件领域都有一定的参考价值.     

Single-nanowire electrically driven lasers

Electrically driven semiconductor lasers are used in technologies ranging from telecommunications and information storage to medical diagnostics and therapeutics. The success of this class of lasers is due in part to well-developed planar semiconductor growth and processing, which enables reproducible fabrication of integrated, electrically driven devices. Yet this approach to device fabrication is also costly and difficult to integrate directly with other technologies such as silicon microelectronics. To overcome these issues for future applications, there has been considerable interest in using organic molecules, polymers, and inorganic nanostructures for lasers, because these materials can be fashioned into devices by chemical processing. Indeed, amplified stimulated emission and lasing have been reported for optically pumped organic systems and, more recently, inorganic nanocrystals and nanowires. However, electrically driven lasing, which is required in most applications, has met with several difficulties in organic systems, and has not been addressed for assembled nanocrystals or nanowires. Here we investigate the feasibility of achieving electrically driven lasing from individual nanowires. Optical and electrical measurements made on single-crystal cadmium sulphide nanowires show that these structures can function as Fabry-Perot optical cavities with mode spacing inversely related to the nanowire length. Investigations of optical and electrical pumping further indicate a threshold for lasing as characterized by optical modes with instrument-limited linewidths. Electrically driven nanowire lasers, which might be assembled in arrays capable of emitting a wide range of colours, could improve existing applications and suggest new opportunities.     

最大匹配问题Tile自组装模型

Tile自组装模型凭借其自组装、可编程等特性在解决NP问题方面具有巨大优势.文中提出了一种求解最大匹配问题的Tile自组装新模型,该模型主要由初始配置子系统、选择子系统及检测子系统3大部分构成.新模型中首先设计Tile分子存储问题信息,其次通过Tile分子自组装操作生成最大匹配问题解空间,最后通过Tile检测分子筛选得到最大匹配问题的解.对模型从所需Tile分子种类、计算时间和计算空间3个方面进行性能分析,并通过实验模拟论证了模型的有效性和正确性.     

铁纳米管壁厚度对磁性的影晌

采用改进的溶胶凝胶还原法,利用阳极氧化铝模板（AAO）制备出了不同管壁厚度的Fe纳米管阵列,利用震动样品磁强计测量了平行和垂直于Fe纳米管阵列的磁滞回线,结果表明易磁化轴平行于纳米管的轴向方向,样品具有明显的磁各向异性．     

SnO2纳米线阵列的制备及纳米器件的制作

采用简单的溶胶-凝胶方法在多孔阳极氧化铝模板(AAM)的微孔中制备了高度有序的SnO2纳米线阵列。XRD,SEM和TEM对样品进行了结构和形貌的表征,结果表明,高度有序的SnO2纳米线具有四方相的多晶结构,纳米线连续均匀;并对SnO2纳米线阵列的生长机理进行了探讨;最后用聚焦离子束沉积设备制作了单根SnO2纳米线器件。     

金纳米线阵列的制备及其光学性能研究

采用二次阳极氧化法制备了高度有序的多孔氧化铝模板,并基于该氧化铝模板,采用脉冲直流电化学沉积的方法制备了金纳米线阵列.利用扫描电子显微镜（SEM）、透射电子显微镜（TEM）和X线衍射仪（XRD）对所制备的金纳米线的形貌及晶体结构进行分析.结果表明：不同的沉积电压下制备的金纳米线具有不同的生长取向性,当沉积电压为3V时制备出的金纳米线沿[200]方向具有明显的生长取向性.利用紫外-可见光谱（UV-Vis）对金纳米线阵列光学性能进行研究,发现金纳米线的等离子体共振吸收峰随着沉积电压的增大先蓝移而后发生红移.     

细胞色素C在纳米银线阵列传感器上的电化学研究

在自制的多孔阳极氧化铝模板辅助下,用直流电解法在玻碳电极表面成功生长了大面积的纳米银线阵列。高分辨扫描电镜照片显示,银纳米线阵列均匀有序,单根纳米线的直径约40 nm,这与所用氧化铝模板的平均孔径(40 nm)相当吻合。将银纳米线阵列传感器用于细胞色素C的电化学研究,灵敏度大大提高,检测限达到0.1 mg/mL。     

磁性氧化铁纳米线的制备与表征

通过溶胶-凝胶法在氧化铝模板（AAO）中制备出了磁性Fe_2O_3纳米线阵列,然后去除AAO模板得到磁性Fe_2O_3纳米线。用SEM,TEM,FTIR,EDX,VSM对磁性纳米线的形貌、微结构和磁性能进行表征。SEM和TEM结果显示磁性纳米线的直径约为50～80nm,长度在8～10μm,长径比为120～180;FTIR和EDX结果表明制备的产物是磁性Fe_2O_3纳米线;VSM结果表明磁性氧化铁纳米线阵列存在明显的磁各向异性。此外,采用Zeta电位仪对磁性Fe_2O_3纳米线表面的电性进行了研究,结果表明纳米线表面带正电荷,有利于和动物细胞相结合。     

基于环栅纳米线隧穿场效应晶体管的解析模型

对环栅纳米线结构的隧穿场效应晶体管进行建模分析, 给出电流解析模型, 证明隧穿场效应管有良好的亚阈特性。研究发现, 环栅纳米线隧穿场效应管的亚阈值斜率SS的大小与圆柱体硅直径d_nw、环栅氧化层厚度t_ox以及漏电压V_dd的变化规律均成正比, 即圆柱体硅直径d_nw、环栅氧化层厚度t_ox和漏电压V_dd越小, 亚阈区的性能越好。这一模型的研究为场效应晶体管在低功耗电路中的应用打下良好基础。