| Wide Symmetrical Dynamic Range PWM Neuron Circuit with Power Efficient Architecture |
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| 作者姓名： | 陈继伟 石秉学 |
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| 作者单位： | CHEN Jiwei SHI Bingxue Institute of Microelectronics，Tsinghua University，Beijing 100084，China |
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| 基金项目： | Supported by the National Natural Science Foundationof China (No.6963 60 3 0) |
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| 摘 要： | IntroductionAs the most important block in artificial neuralnetworks (ANNs) ,the behavior of the neuronstrongly influences the performance of the wholenetwork. The sigmoid function is popularlyadopted as the activation function of artificialneurons.The pulse stream approaches,which isoften used to model a neuron with this function,has a digital stream output as an analoginformation axis1] .There have been several kindsof pulse stream neuron circuits2 4 ] .The circuitproposed by Haycock and…
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Wide Symmetrical Dynamic Range PWM Neuron Circuit with Power Efficient Architecture |
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| CHEN Jiwei SHI Bingxue Institute of Microelectronics,Tsinghua University,Beijing ,China.Wide Symmetrical Dynamic Range PWM Neuron Circuit with Power Efficient Architecture[J].Tsinghua Science and Technology,2002,7(5). |
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| Authors: | CHEN Jiwei SHI Bingxue Institute of Microelectronics Tsinghua University Beijing China |
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| Institution: | CHEN Jiwei SHI Bingxue Institute of Microelectronics,Tsinghua University,Beijing 100084,China |
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| Abstract: | A novel pulse stream neuron circuit is presented whose output pulse width facilitates sigmoid activation to activate the function of neurons. The wide symmetrical dynamic range of this neuron ensures high noise immunity. The pulsed activation strategy provides a power efficient architecture, so the circuit has very low power dissipation. The simplicity of the circuit ensures its suitability for large-scale integration. |
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| Keywords: | neuron network pulsed activation pulse width modulation (PWM) low power design very large scale integration (VLSI) complementary metal-oxide-semiconductor (CMOS) transistor |
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