| 一种快速超前进位加法器的优化设计 |
| |
| 引用本文： | 王云贵.一种快速超前进位加法器的优化设计[J].科学技术与工程,2010,10(33). |
| |
| 作者姓名： | 王云贵 |
| |
| 作者单位： | 西安微电子技术研究所,西安,710054 |
| |
| 摘 要： | 加法器是处理器的一个基本功能部件，随着处理器频率的不断提高， 对加法器的也提出了更高的要求.超前进位（CLA）是最快的加法器之一。本文提出了一种新的改善超前进位加法器性能的方法，用DC对4种CLA进行了综合，结果表明与目前已有的CLA相比，本文提出的CLA速度更快，面积更小，并给出了统计数据。
|
| 关 键 词： | 超前进位，加法器，门级优化，与或非复合门，综合 |
| 收稿时间： | 9/4/2010 11:09:59 PM |
| 修稿时间： | 2010/9/20 0:00:00 |
Design and Optimization of a Fast Carry Look Ahead Adder |
| |
| wang yun gui.Design and Optimization of a Fast Carry Look Ahead Adder[J].Science Technology and Engineering,2010,10(33). |
| |
| Authors: | wang yun gui |
| |
| Institution: | WANG Yun-gui,YANG Liang(Xi'an Microelectronics Technology Institute,Xi'an 710054,P.R.China) |
| |
| Abstract: | Adder is a very basic component in a CPU. As the speed of microprocessor increasing rapidly, it put more request toward adder. The carry look ahead adder is one of the fastest adder. In this paper, a new method for modifying the carry look ahead adder is proposed. Use DC to synthesize four kinds of CLA, found that the CLA this paper proposed have the highest speed and the smallest area. The statistic is also present. |
| |
| Keywords: | CLA Adder Gate Level Optimize AOI synthesize |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
| 点击此处可从《科学技术与工程》浏览原始摘要信息 |
| 点击此处可从《科学技术与工程》下载免费的PDF全文 |
