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面向媒体的粗粒度可重构架构层次化存储设计
引用本文:曹鹏,梅晨,刘波.面向媒体的粗粒度可重构架构层次化存储设计[J].上海交通大学学报,2014,48(10):1389-1393.
作者姓名:曹鹏  梅晨  刘波
作者单位:(东南大学 国家专用集成电路系统工程技术研究中心, 南京 2100961)
摘    要:为了优化粗粒度可重构架构REMUS-II(Reconfigurable Multimedia System 2)的数据流通路,使其能够完成高性能媒体解码,针对媒体算法的数据访问特征,对REMUS-II的片上存储与片外存储访问模块进行优化.片上存储通过二维数据传输和转置等访问模式进行优化,片上数据传输效率分别平均提高了69.6%和15.1%.片外存储通过块缓存设计优化参考帧访问,平均减少37%的外存访问时间.经过层次化存储设计,REMUS-II数据流可满足计算需求,在200MHz主频下实现H.264算法和MPEG2算法高级档次的1 920像素×1 080像素高清分辨率实时解码.

关 键 词:粗粒度可重构架构    媒体应用    层次化存储    高清解码  
收稿时间:2013-10-19

Hierarchical Memory Optimization Based on Coarse Grain Reconfigurable Architecture for Multimedia Application
CAO Peng;MEI Chen;LIU Bo.Hierarchical Memory Optimization Based on Coarse Grain Reconfigurable Architecture for Multimedia Application[J].Journal of Shanghai Jiaotong University,2014,48(10):1389-1393.
Authors:CAO Peng;MEI Chen;LIU Bo
Institution:(National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China)
Abstract:In order to optimize the data flow of coarse grain reconfigurable architecture REMUS-II(Reconfigurable Multimedia System2) for high performance media decoding, a novel memory sub-architecture of on-and off-chip memory was proposed by analyzing the data access pattern for multimedia application. For on-chip memory, the 2D data and transpose transfer technique was employed to improve the data transfer efficiency by 69.6% and 15.1% on average, respectively. For off-chip memory, the block buffer was implemented to reduce the reference frame accesses with a 37% reduction of accessing time on average. With the memory hierarchy optimization, REMUS-II can achieve real-time H.264 high profile and MPEG2 high level decoding with a definition of 1 980 pixel×1 080 pixel at 200 MHz clock frequency.
Keywords:coarse grain reconfigurable architecture (CGRA)  multimedia application  hierarchical memory  high-definition decoding  
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