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高速交替/并行数据采集系统时钟研究
引用本文:张俊杰,武杰,刘尉悦,乔崇,王砚方.高速交替/并行数据采集系统时钟研究[J].中国科学技术大学学报,2006,36(3):281-284.
作者姓名:张俊杰  武杰  刘尉悦  乔崇  王砚方
作者单位:中国科学技术大学近代物理系快电子学实验室,安徽,合肥,230026
摘    要:研究了交替/并行数据采集系统中采样时钟抖动、采样时钟偏差、高速ADC量化误差与采集系统信噪比的关系.通过对采样数据的一级近似以及合理的假设,推导出了信噪比的数学表达式.用建立的仿真模型验证了数学表达式.结果表明,在输入信号频率较高时,信噪比以20 dB/10倍频下降,时钟抖动等效均方值决定了20 dB/10倍频下降的起始位置.

关 键 词:交替/并行采集  时钟抖动  信噪比  时钟偏差
文章编号:0253-2778(2006)03-0281-04
收稿时间:03 22 2005 12:00AM
修稿时间:09 7 2005 12:00AM

Clock study of high speed interleaving/multiplexing data-acquisition system
ZHANG Jun-jie,WU Jie,LIU Wei-yue,QIAO Chong,WANG Yan-fang.Clock study of high speed interleaving/multiplexing data-acquisition system[J].Journal of University of Science and Technology of China,2006,36(3):281-284.
Authors:ZHANG Jun-jie  WU Jie  LIU Wei-yue  QIAO Chong  WANG Yan-fang
Institution:Fast Electronic Lab, Department of Modern Physics, University of Science and Technology of China, Hefei 230026, China
Abstract:Clock related issues in interleaving/multiplexing data acquisition systems were studied. Based on a linear approximation and some reasonable propositions, a powerful expression for the SNR was derived. A simulation model used to verify the SNR expression was proposed. It is shown that SNR drops 20dB per decade change of signal frequency at high frequency and the equivalent deviation of clock jitter decides the start position where SNR drops.
Keywords:interleaving/multiplexing sampling  clock jitter  signal noise ratio(SNR)  clock skew  
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