| Design and Implementation of a Novel Algorithm for Iterative Decoding of Product Codes |
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| 作者姓名： | 李宗旺 Song Wentao Luo Hanwen |
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| 作者单位： | ElectronicEngineeringDepartment,ShanghaiJiaotongUniversity,Shanghai200030,P.R.China |
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| 基金项目： | the National Natural Science Foundation of China. |
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| 摘 要： | A novel product code iterative decoding algorithm and its high speed implementation scheme are proposed in this paper.Based on partial combination of selected columns of check matrix,the reduced-complexity syndrome decoding method is proposed to decode sub-codes of product code and deliver soft output information.So iterative decoding of product codes is possible.The fast sorting algorithm and a look-up method are proposed for high speed implementation of this algo-rithm.Compared to the conventional weighing iterative algorithm,the proposed algorithm has lower complexity while offering better performance,which is demonstrated by simulations and implementation analysis.The implementation scheme and verilog HDL simulation show that it is feasible to achieve high speed decoding with the proposed algorithm.
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| 关 键 词： | Turbo码 乘积码 叠代解码 故障译码 运算法则 |
Design and Implementation of a Novel Algorithm for Iterative Decoding of Product Codes |
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| Song Wentao,Luo Hanwen.Design and Implementation of a Novel Algorithm for Iterative Decoding of Product Codes[J].High Technology Letters,2003,9(1):35-40. |
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| Authors: | Song Wentao Luo Hanwen |
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| Abstract: | A novel product code iterative decoding algorithm and its high speed implementation scheme are proposed in this paper. Based on partial combination of selected columns of check matrix, the reduced-complexity syndrome decoding method is proposed to decode sub-codes of product code and deliver soft output information. So iterative decoding of product codes is possible. The fast sorting algorithm and a look-up method are proposed for high speed implementation of this algorithm. Compared to the conventional weighing iterative algorithm, the proposed algorithm has lower complexity while offering better performance, which is demonstrated by simulations and implementation analysis. The implementation scheme and verilog HDL simulation show that it is feasible to achieve high speed decoding with the proposed algorithm. |
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| Keywords: | iterative decoding product codes syndrome decoding FPGA |
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