| 可变频标准信号源的VHDL设计 |
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| 引用本文： | 王春玲,王杰.可变频标准信号源的VHDL设计[J].泰山学院学报,2008,30(6):79-82. |
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| 作者姓名： | 王春玲 王杰 |
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| 作者单位： | 泰山学院 物理与电子工程学院,山东 泰安,271021 |
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| 基金项目： | 泰山学院科研资助重点立项项目
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| 摘 要： | 本文实现了基于EDA技术的多种标准信号源的设计，并利用分频原理实现了输出信号的变频控制．通过编译和仿真验证了设计的可行性．本文对多种信号发生器的嵌入式设计具有参考价值．
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| 关 键 词： | 标准信号源 分频 时序仿真 嵌入式设计 |
The Design with VHDL of Frequency-Alterable Signal Sources |
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| WANG Chun-ling,WANG Jie.The Design with VHDL of Frequency-Alterable Signal Sources[J].Journal of Taishan University,2008,30(6):79-82. |
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| Authors: | WANG Chun-ling WANG Jie |
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| Institution: | WANG Chun-ling,WANG Jie(College of Physics , Electronic Engineering,Taishan University,Tai\'an,271021,China) |
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| Abstract: | The designs of many kinds of standard signal sources based on Electronic Design Automation(EDA) technology are realized in this paper,and frequency-changed outputs based on frequency division theoryis designed,too.The feasibilityof the design is verified with compiler and timing simulating.This paper may has referencevalue for embedded design of sorts of signal generaters. |
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| Keywords: | standard signal source frequency division timing simulating embedded design |
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