交流电沉积条件对沉积Ni纳米线的影响

采用恒压40V二次阳极氧化方法制备了阳极氧化铝(AAO)模板,模板的孔径均匀有序。在二次阳极氧化的基础上阶梯降低电压至10V,可有效减薄阻隔层,有利于Ni纳米线的交流电沉积。利用扫描电子显微镜和透射电子显微镜对AAO模板以及Ni纳米线的形貌进行表征。探索了阶梯降低氧化电压、电源滤波以及电沉积频率对沉积Ni纳米线的影响。结果表明,阶梯降低氧化电压、适当的频率以及滤波可以明显提高电沉积效果,得到比较均匀有序的Ni纳米线。

AC Electrodeposition Conditions Dependence of Ni Nanowire Arrays

Highly ordered anodic aluminium oxide （AAO） pores were successfully fabricated on aluminium template using a two-step anodization method at 40 oxidation voltages. After the secondary anodic oxida-tion step, the anodic oxidation voltage decrescence step by step to 10 voltages could effectively reduce the thickness of barrier layer. Ni nanowire arrays were prepared using alternating current （AC） electro-deposi-tion. The morphology of the AAO template and the Ni nanowire arrays was characterized by transmission electron microscopy （TEM） and scanning electron microscope （SEM）. This paper explored the stepping down oxidation voltage,power filter and frequency dependence of Ni nanowire arrays. The results showed that the stepping down oxidation voltage, power filter could greatly improve the electro-deposition effect and obtain the uniform and ordered Ni nanowires.