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适用于多种无线通信标准的宽带CMOS频率综合器
引用本文:周谨,李巍,黄德平,李宁,任俊彦.适用于多种无线通信标准的宽带CMOS频率综合器[J].复旦学报(自然科学版),2012,51(1):7-14.
作者姓名:周谨  李巍  黄德平  李宁  任俊彦
作者单位:复旦大学专用集成电路与系统国家重点实验室,上海,201203
基金项目:国家高技术研究发展计划(“863”计划),国家科技重大专项
摘    要:采用小数分频锁相环路、正交单边带混频器和除2除法器设计了一款全集成CMOS频率综合器,以满足多种无线通信标准的要求.提出基于双模压控振荡器(DMVCO)的频率综合器架构,一方面能够通过除2除法器覆盖3GHz以下的无线通信频段,另一方面DMVCO自身又替代了额外的多相滤波器来抑制混频器引入的镜像杂散.频率自动校准电路能对压控振荡器的频率进行快速、准确的校准.频率综合器采用TSMC 0.13μmCMOS工艺进行设计.仿真结果表明,在输出频率为900MHz时频偏在0.6MHz处,频率综合器的相位噪声为-122dBc/Hz;在功耗不大于56mW的情况下,频率综合器实现了0.4~6GHz的频率覆盖范围.

关 键 词:多模无线通信  压控振荡器  频率自动校准  频率综合器

A CMOS Frequency Synthesizer for Multi-standard Wireless Communications
ZHOU Jin,LI Wei,HUANG De-ping,LI Ning,REN Jun-yan.A CMOS Frequency Synthesizer for Multi-standard Wireless Communications[J].Journal of Fudan University(Natural Science),2012,51(1):7-14.
Authors:ZHOU Jin  LI Wei  HUANG De-ping  LI Ning  REN Jun-yan
Institution:(State Key Laboratory of ASIC and System,Fudan University,Shanghai 201203,China)
Abstract:To fulfill the requirements of the multi-standard wireless communications,a CMOS frequency synthesizer is proposed,based on a fractional-N PLL,a quadrature sigle-sideband mixer and divide-by-2 dividers.The proposed synthesizer architecture based on a Dual-Mode VCO can cover the entire frequency band below 3GHz and avoid the usage of the additional poly-phase filter.Automatic frequency calibration circuit is integrated with the synthesizer to guarantee fast and accurate PLL settling.The circuit is implemented in TSMC 0.13 μm CMOS process.Simulated phase noise is-127 dBc/Hz at 1.6 MHz offset from a 1.8GHz carrier.The synthesizer achieves a continuous 0.4~6GHz tuning range with less than 56 mW power.
Keywords:multi-standard wireless communications  VCO  automatic frequency calibration  frequency synthesizer
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